diff options
Diffstat (limited to 'deps/v8/src/s390/simulator-s390.cc')
-rw-r--r-- | deps/v8/src/s390/simulator-s390.cc | 59 |
1 files changed, 30 insertions, 29 deletions
diff --git a/deps/v8/src/s390/simulator-s390.cc b/deps/v8/src/s390/simulator-s390.cc index 04b2a7748c..588d1b6e40 100644 --- a/deps/v8/src/s390/simulator-s390.cc +++ b/deps/v8/src/s390/simulator-s390.cc @@ -4499,30 +4499,15 @@ EVALUATE(LLILL) { return 0; } -EVALUATE(TMLH) { - UNIMPLEMENTED(); - USE(instr); - return 0; -} - -EVALUATE(TMLL) { - DCHECK_OPCODE(TMLL); - DECODE_RI_A_INSTRUCTION(instr, r1, i2); - uint32_t mask = i2 & 0x0000FFFF; - uint32_t r1_val = get_low_register<uint32_t>(r1); - r1_val = r1_val & 0x0000FFFF; // uses only the last 16bits - +inline static int TestUnderMask(uint16_t val, uint16_t mask) { // Test if all selected bits are zeros or mask is zero - if (0 == (mask & r1_val)) { - condition_reg_ = 0x8; - return length; // Done! + if (0 == (mask & val)) { + return 0x8; } - DCHECK_NE(mask, 0); - // Test if all selected bits are one - if (mask == (mask & r1_val)) { - condition_reg_ = 0x1; - return length; // Done! + // Test if all selected bits are one or mask is 0 + if (mask == (mask & val)) { + return 0x1; } // Now we know selected bits mixed zeros and ones @@ -4530,31 +4515,47 @@ EVALUATE(TMLL) { #if defined(__GNUC__) int leadingZeros = __builtin_clz(mask); mask = 0x80000000u >> leadingZeros; - if (mask & r1_val) { + if (mask & val) { // leftmost bit is one - condition_reg_ = 0x2; + return 0x2; } else { // leftmost bit is zero - condition_reg_ = 0x4; + return 0x4; } - return length; // Done! #else for (int i = 15; i >= 0; i--) { if (mask & (1 << i)) { - if (r1_val & (1 << i)) { + if (val & (1 << i)) { // leftmost bit is one - condition_reg_ = 0x2; + return 0x2; } else { // leftmost bit is zero - condition_reg_ = 0x4; + return 0x4; } - return length; // Done! } } #endif UNREACHABLE(); } +EVALUATE(TMLH) { + DCHECK_OPCODE(TMLH); + DECODE_RI_A_INSTRUCTION(instr, r1, i2); + uint32_t value = get_low_register<uint32_t>(r1) >> 16; + uint32_t mask = i2 & 0x0000FFFF; + condition_reg_ = TestUnderMask(value, mask); + return length; // DONE +} + +EVALUATE(TMLL) { + DCHECK_OPCODE(TMLL); + DECODE_RI_A_INSTRUCTION(instr, r1, i2); + uint32_t value = get_low_register<uint32_t>(r1) & 0x0000FFFF; + uint32_t mask = i2 & 0x0000FFFF; + condition_reg_ = TestUnderMask(value, mask); + return length; // DONE +} + EVALUATE(TMHH) { UNIMPLEMENTED(); USE(instr); |