diff options
Diffstat (limited to 'deps/v8/src/ppc/assembler-ppc.h')
| -rw-r--r-- | deps/v8/src/ppc/assembler-ppc.h | 98 |
1 files changed, 63 insertions, 35 deletions
diff --git a/deps/v8/src/ppc/assembler-ppc.h b/deps/v8/src/ppc/assembler-ppc.h index 82d068503d..a1c08ad0ea 100644 --- a/deps/v8/src/ppc/assembler-ppc.h +++ b/deps/v8/src/ppc/assembler-ppc.h @@ -591,10 +591,11 @@ class Assembler : public AssemblerBase { // Returns the branch offset to the given label from the current code position // Links the label to the current position if it is still unbound - // Manages the jump elimination optimization if the second parameter is true. - int branch_offset(Label* L, bool jump_elimination_allowed) { - int position = link(L); - return position - pc_offset(); + int branch_offset(Label* L) { + if (L->is_unused() && !trampoline_emitted_) { + TrackBranch(); + } + return link(L) - pc_offset(); } // Puts a labels target address at the given position. @@ -642,9 +643,6 @@ class Assembler : public AssemblerBase { // in the instruction stream that the call will return to. INLINE(static Address return_address_from_call_start(Address pc)); - // Return the code target address of the patch debug break slot - INLINE(static Address break_address_from_return_address(Address pc)); - // This sets the branch destination. // This is for calls and branches within generated code. inline static void deserialization_set_special_target_at( @@ -695,14 +693,6 @@ class Assembler : public AssemblerBase { static const int kCallTargetAddressOffset = (kMovInstructions + 2) * kInstrSize; - // Distance between start of patched return sequence and the emitted address - // to jump to. - // Patched return sequence is a FIXED_SEQUENCE: - // mov r0, <address> - // mtlr r0 - // blrl - static const int kPatchReturnSequenceAddressOffset = 0 * kInstrSize; - // Distance between start of patched debug break slot and the emitted address // to jump to. // Patched debug break slot code is a FIXED_SEQUENCE: @@ -711,13 +701,6 @@ class Assembler : public AssemblerBase { // blrl static const int kPatchDebugBreakSlotAddressOffset = 0 * kInstrSize; - // This is the length of the BreakLocation::SetDebugBreakAtReturn() - // code patch FIXED_SEQUENCE - static const int kJSReturnSequenceInstructions = - kMovInstructionsNoConstantPool + 3; - static const int kJSReturnSequenceLength = - kJSReturnSequenceInstructions * kInstrSize; - // This is the length of the code sequence from SetDebugBreakAtSlot() // FIXED_SEQUENCE static const int kDebugBreakSlotInstructions = @@ -743,17 +726,17 @@ class Assembler : public AssemblerBase { void CodeTargetAlign(); // Branch instructions - void bclr(BOfield bo, LKBit lk); + void bclr(BOfield bo, int condition_bit, LKBit lk); void blr(); void bc(int branch_offset, BOfield bo, int condition_bit, LKBit lk = LeaveLK); void b(int branch_offset, LKBit lk); - void bcctr(BOfield bo, LKBit lk); + void bcctr(BOfield bo, int condition_bit, LKBit lk); void bctr(); void bctrl(); // Convenience branch instructions using labels - void b(Label* L, LKBit lk = LeaveLK) { b(branch_offset(L, false), lk); } + void b(Label* L, LKBit lk = LeaveLK) { b(branch_offset(L), lk); } inline CRegister cmpi_optimization(CRegister cr) { // Check whether the branch is preceeded by an optimizable cmpi against 0. @@ -798,7 +781,7 @@ class Assembler : public AssemblerBase { cr = cmpi_optimization(cr); - int b_offset = branch_offset(L, false); + int b_offset = branch_offset(L); switch (cond) { case eq: @@ -836,6 +819,48 @@ class Assembler : public AssemblerBase { } } + void bclr(Condition cond, CRegister cr = cr7, LKBit lk = LeaveLK) { + DCHECK(cond != al); + DCHECK(cr.code() >= 0 && cr.code() <= 7); + + cr = cmpi_optimization(cr); + + switch (cond) { + case eq: + bclr(BT, encode_crbit(cr, CR_EQ), lk); + break; + case ne: + bclr(BF, encode_crbit(cr, CR_EQ), lk); + break; + case gt: + bclr(BT, encode_crbit(cr, CR_GT), lk); + break; + case le: + bclr(BF, encode_crbit(cr, CR_GT), lk); + break; + case lt: + bclr(BT, encode_crbit(cr, CR_LT), lk); + break; + case ge: + bclr(BF, encode_crbit(cr, CR_LT), lk); + break; + case unordered: + bclr(BT, encode_crbit(cr, CR_FU), lk); + break; + case ordered: + bclr(BF, encode_crbit(cr, CR_FU), lk); + break; + case overflow: + bclr(BT, encode_crbit(cr, CR_SO), lk); + break; + case nooverflow: + bclr(BF, encode_crbit(cr, CR_SO), lk); + break; + default: + UNIMPLEMENTED(); + } + } + void isel(Register rt, Register ra, Register rb, int cb); void isel(Condition cond, Register rt, Register ra, Register rb, CRegister cr = cr7) { @@ -931,7 +956,7 @@ class Assembler : public AssemblerBase { // Decrement CTR; branch if CTR != 0 void bdnz(Label* L, LKBit lk = LeaveLK) { - bc(branch_offset(L, false), DCBNZ, 0, lk); + bc(branch_offset(L), DCBNZ, 0, lk); } // Data-processing instructions @@ -1296,11 +1321,11 @@ class Assembler : public AssemblerBase { // Debugging - // Mark address of the ExitJSFrame code. - void RecordJSReturn(); + // Mark generator continuation. + void RecordGeneratorContinuation(); // Mark address of a debug break slot. - void RecordDebugBreakSlot(); + void RecordDebugBreakSlot(RelocInfo::Mode mode, int argc = 0); // Record the AST id of the CallIC being compiled, so that it can be placed // in the relocation information. @@ -1419,11 +1444,12 @@ class Assembler : public AssemblerBase { int buffer_space() const { return reloc_info_writer.pos() - pc_; } - // Decode branch instruction at pos and return branch target pos + // Decode instruction(s) at pos and return backchain to previous + // label reference or kEndOfChain. int target_at(int pos); - // Patch branch instruction at pos to branch to given branch target pos - void target_at_put(int pos, int target_pos); + // Patch instruction(s) at pos to target target_pos (e.g. branch) + void target_at_put(int pos, int target_pos, bool* is_branch = nullptr); // Record reloc info for current pc_ void RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data = 0); @@ -1475,7 +1501,7 @@ class Assembler : public AssemblerBase { // Repeated checking whether the trampoline pool should be emitted is rather // expensive. By default we only check again once a number of instructions // has been generated. - int next_buffer_check_; // pc offset of next buffer check. + int next_trampoline_check_; // pc offset of next buffer check. // Emission of the trampoline pool may be blocked in some code sequences. int trampoline_pool_blocked_nesting_; // Block emission if this is not zero. @@ -1502,6 +1528,8 @@ class Assembler : public AssemblerBase { inline void CheckBuffer(); void GrowBuffer(int needed = 0); inline void emit(Instr x); + inline void TrackBranch(); + inline void UntrackBranch(); inline void CheckTrampolinePoolQuick(); // Instruction generation @@ -1555,7 +1583,7 @@ class Assembler : public AssemblerBase { }; int32_t get_trampoline_entry(); - int unbound_labels_count_; + int tracked_branch_count_; // If trampoline is emitted, generated code is becoming large. As // this is already a slow case which can possibly break our code // generation for the extreme case, we use this information to |