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-rw-r--r--deps/v8/src/mips/assembler-mips.cc36
-rw-r--r--deps/v8/src/mips/assembler-mips.h9
-rw-r--r--deps/v8/src/mips/code-stubs-mips.cc10
-rw-r--r--deps/v8/src/mips/codegen-mips.cc32
-rw-r--r--deps/v8/src/mips/disasm-mips.cc10
-rw-r--r--deps/v8/src/mips/interface-descriptors-mips.cc16
-rw-r--r--deps/v8/src/mips/macro-assembler-mips.cc42
-rw-r--r--deps/v8/src/mips/macro-assembler-mips.h31
-rw-r--r--deps/v8/src/mips/simulator-mips.cc15
9 files changed, 143 insertions, 58 deletions
diff --git a/deps/v8/src/mips/assembler-mips.cc b/deps/v8/src/mips/assembler-mips.cc
index 2c04430509..ee39c524f6 100644
--- a/deps/v8/src/mips/assembler-mips.cc
+++ b/deps/v8/src/mips/assembler-mips.cc
@@ -41,6 +41,7 @@
#include "src/code-stubs.h"
#include "src/deoptimizer.h"
#include "src/mips/assembler-mips-inl.h"
+#include "src/string-constants.h"
namespace v8 {
namespace internal {
@@ -248,6 +249,13 @@ Operand Operand::EmbeddedCode(CodeStub* stub) {
return result;
}
+Operand Operand::EmbeddedStringConstant(const StringConstantBase* str) {
+ Operand result(0, RelocInfo::EMBEDDED_OBJECT);
+ result.is_heap_object_request_ = true;
+ result.value_.heap_object_request = HeapObjectRequest(str);
+ return result;
+}
+
MemOperand::MemOperand(Register rm, int32_t offset) : Operand(rm) {
offset_ = offset;
}
@@ -259,6 +267,7 @@ MemOperand::MemOperand(Register rm, int32_t unit, int32_t multiplier,
}
void Assembler::AllocateAndInstallRequestedHeapObjects(Isolate* isolate) {
+ DCHECK_IMPLIES(isolate == nullptr, heap_object_requests_.empty());
for (auto& request : heap_object_requests_) {
Handle<HeapObject> object;
switch (request.kind()) {
@@ -270,6 +279,11 @@ void Assembler::AllocateAndInstallRequestedHeapObjects(Isolate* isolate) {
request.code_stub()->set_isolate(isolate);
object = request.code_stub()->GetCode();
break;
+ case HeapObjectRequest::kStringConstant:
+ const StringConstantBase* str = request.string();
+ CHECK_NOT_NULL(str);
+ object = str->AllocateStringConstant(isolate);
+ break;
}
Address pc = reinterpret_cast<Address>(buffer_) + request.offset();
set_target_value_at(pc, reinterpret_cast<uint32_t>(object.location()));
@@ -2321,6 +2335,16 @@ void Assembler::sc(Register rd, const MemOperand& rs) {
}
}
+void Assembler::llwp(Register rd, Register rt, Register base) {
+ DCHECK(IsMipsArchVariant(kMips32r6));
+ GenInstrRegister(SPECIAL3, base, rt, rd, 1, LL_R6);
+}
+
+void Assembler::scwp(Register rd, Register rt, Register base) {
+ DCHECK(IsMipsArchVariant(kMips32r6));
+ GenInstrRegister(SPECIAL3, base, rt, rd, 1, SC_R6);
+}
+
void Assembler::lui(Register rd, int32_t j) {
DCHECK(is_uint16(j) || is_int16(j));
GenInstrImmediate(LUI, zero_reg, rd, j);
@@ -3873,17 +3897,11 @@ void Assembler::dd(Label* label) {
void Assembler::RecordRelocInfo(RelocInfo::Mode rmode, intptr_t data) {
+ if (!ShouldRecordRelocInfo(rmode)) return;
// We do not try to reuse pool constants.
RelocInfo rinfo(reinterpret_cast<Address>(pc_), rmode, data, nullptr);
- if (!RelocInfo::IsNone(rinfo.rmode())) {
- if (options().disable_reloc_info_for_patching) return;
- if (RelocInfo::IsOnlyForSerializer(rmode) &&
- !options().record_reloc_info_for_serialization && !emit_debug_code()) {
- return;
- }
- DCHECK_GE(buffer_space(), kMaxRelocSize); // Too late to grow buffer here.
- reloc_info_writer.Write(&rinfo);
- }
+ DCHECK_GE(buffer_space(), kMaxRelocSize); // Too late to grow buffer here.
+ reloc_info_writer.Write(&rinfo);
}
void Assembler::BlockTrampolinePoolFor(int instructions) {
diff --git a/deps/v8/src/mips/assembler-mips.h b/deps/v8/src/mips/assembler-mips.h
index 5a51522940..d535f1e923 100644
--- a/deps/v8/src/mips/assembler-mips.h
+++ b/deps/v8/src/mips/assembler-mips.h
@@ -304,7 +304,6 @@ typedef FPURegister DoubleRegister;
DOUBLE_REGISTERS(DECLARE_DOUBLE_REGISTER)
#undef DECLARE_DOUBLE_REGISTER
-constexpr DoubleRegister no_freg = DoubleRegister::no_reg();
constexpr DoubleRegister no_dreg = DoubleRegister::no_reg();
// SIMD registers.
@@ -385,7 +384,7 @@ constexpr MSAControlRegister MSACSR = {kMSACSRRegister};
// Machine instruction Operands.
// Class Operand represents a shifter operand in data processing instructions.
-class Operand BASE_EMBEDDED {
+class Operand {
public:
// Immediate.
V8_INLINE explicit Operand(int32_t immediate,
@@ -408,6 +407,7 @@ class Operand BASE_EMBEDDED {
static Operand EmbeddedNumber(double number); // Smi or HeapNumber.
static Operand EmbeddedCode(CodeStub* stub);
+ static Operand EmbeddedStringConstant(const StringConstantBase* str);
// Register.
V8_INLINE explicit Operand(Register rm) : rm_(rm) {}
@@ -883,6 +883,8 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
void ll(Register rd, const MemOperand& rs);
void sc(Register rd, const MemOperand& rs);
+ void llwp(Register rd, Register rt, Register base);
+ void scwp(Register rd, Register rt, Register base);
// ---------PC-Relative-instructions-----------
@@ -2212,8 +2214,7 @@ class V8_EXPORT_PRIVATE Assembler : public AssemblerBase {
friend class EnsureSpace;
};
-
-class EnsureSpace BASE_EMBEDDED {
+class EnsureSpace {
public:
explicit inline EnsureSpace(Assembler* assembler);
};
diff --git a/deps/v8/src/mips/code-stubs-mips.cc b/deps/v8/src/mips/code-stubs-mips.cc
index 3da00d4748..1650458d19 100644
--- a/deps/v8/src/mips/code-stubs-mips.cc
+++ b/deps/v8/src/mips/code-stubs-mips.cc
@@ -119,7 +119,7 @@ void JSEntryStub::Generate(MacroAssembler* masm) {
__ li(t0, ExternalReference::Create(
IsolateAddressId::kPendingExceptionAddress, isolate));
__ sw(v0, MemOperand(t0)); // We come back from 'invoke'. result is in v0.
- __ LoadRoot(v0, Heap::kExceptionRootIndex);
+ __ LoadRoot(v0, RootIndex::kException);
__ b(&exit); // b exposes branch delay slot.
__ nop(); // Branch delay slot nop.
@@ -415,7 +415,7 @@ static void CallApiFunctionAndReturn(MacroAssembler* masm,
stack_space_offset != kInvalidStackOffset);
// Check if the function scheduled an exception.
- __ LoadRoot(t0, Heap::kTheHoleValueRootIndex);
+ __ LoadRoot(t0, RootIndex::kTheHoleValue);
__ li(kScratchReg, ExternalReference::scheduled_exception_address(isolate));
__ lw(t1, MemOperand(kScratchReg));
__ Branch(&promote_scheduled_exception, ne, t0, Operand(t1));
@@ -466,13 +466,13 @@ void CallApiCallbackStub::Generate(MacroAssembler* masm) {
STATIC_ASSERT(FCA::kHolderIndex == 0);
// new target
- __ PushRoot(Heap::kUndefinedValueRootIndex);
+ __ PushRoot(RootIndex::kUndefinedValue);
// call data.
__ Push(call_data);
Register scratch = call_data;
- __ LoadRoot(scratch, Heap::kUndefinedValueRootIndex);
+ __ LoadRoot(scratch, RootIndex::kUndefinedValue);
// Push return value and default return value.
__ Push(scratch, scratch);
__ li(scratch, ExternalReference::isolate_address(masm->isolate()));
@@ -543,7 +543,7 @@ void CallApiGetterStub::Generate(MacroAssembler* masm) {
__ sw(receiver, MemOperand(sp, (PCA::kThisIndex + 1) * kPointerSize));
__ lw(scratch, FieldMemOperand(callback, AccessorInfo::kDataOffset));
__ sw(scratch, MemOperand(sp, (PCA::kDataIndex + 1) * kPointerSize));
- __ LoadRoot(scratch, Heap::kUndefinedValueRootIndex);
+ __ LoadRoot(scratch, RootIndex::kUndefinedValue);
__ sw(scratch, MemOperand(sp, (PCA::kReturnValueOffset + 1) * kPointerSize));
__ sw(scratch, MemOperand(sp, (PCA::kReturnValueDefaultValueIndex + 1) *
kPointerSize));
diff --git a/deps/v8/src/mips/codegen-mips.cc b/deps/v8/src/mips/codegen-mips.cc
index d6b47990f8..86546668db 100644
--- a/deps/v8/src/mips/codegen-mips.cc
+++ b/deps/v8/src/mips/codegen-mips.cc
@@ -7,7 +7,6 @@
#include <memory>
#include "src/codegen.h"
-#include "src/isolate.h"
#include "src/macro-assembler.h"
#include "src/mips/simulator-mips.h"
@@ -18,18 +17,18 @@ namespace internal {
#if defined(V8_HOST_ARCH_MIPS)
-MemCopyUint8Function CreateMemCopyUint8Function(Isolate* isolate,
- MemCopyUint8Function stub) {
+MemCopyUint8Function CreateMemCopyUint8Function(MemCopyUint8Function stub) {
#if defined(USE_SIMULATOR) || defined(_MIPS_ARCH_MIPS32R6) || \
defined(_MIPS_ARCH_MIPS32RX)
return stub;
#else
+ v8::PageAllocator* page_allocator = GetPlatformPageAllocator();
size_t allocated = 0;
- byte* buffer = AllocatePage(isolate->heap()->GetRandomMmapAddr(), &allocated);
+ byte* buffer = AllocatePage(page_allocator,
+ page_allocator->GetRandomMmapAddr(), &allocated);
if (buffer == nullptr) return nullptr;
- MacroAssembler masm(isolate, buffer, static_cast<int>(allocated),
- CodeObjectRequired::kNo);
+ MacroAssembler masm(AssemblerOptions{}, buffer, static_cast<int>(allocated));
// This code assumes that cache lines are 32 bytes and if the cache line is
// larger it will not work correctly.
@@ -541,26 +540,28 @@ MemCopyUint8Function CreateMemCopyUint8Function(Isolate* isolate,
__ nop();
}
CodeDesc desc;
- masm.GetCode(isolate, &desc);
+ masm.GetCode(nullptr, &desc);
DCHECK(!RelocInfo::RequiresRelocationAfterCodegen(desc));
Assembler::FlushICache(buffer, allocated);
- CHECK(SetPermissions(buffer, allocated, PageAllocator::kReadExecute));
+ CHECK(SetPermissions(page_allocator, buffer, allocated,
+ PageAllocator::kReadExecute));
return FUNCTION_CAST<MemCopyUint8Function>(buffer);
#endif
}
#endif
-UnaryMathFunctionWithIsolate CreateSqrtFunction(Isolate* isolate) {
+UnaryMathFunction CreateSqrtFunction() {
#if defined(USE_SIMULATOR)
return nullptr;
#else
+ v8::PageAllocator* page_allocator = GetPlatformPageAllocator();
size_t allocated = 0;
- byte* buffer = AllocatePage(isolate->heap()->GetRandomMmapAddr(), &allocated);
+ byte* buffer = AllocatePage(page_allocator,
+ page_allocator->GetRandomMmapAddr(), &allocated);
if (buffer == nullptr) return nullptr;
- MacroAssembler masm(isolate, buffer, static_cast<int>(allocated),
- CodeObjectRequired::kNo);
+ MacroAssembler masm(AssemblerOptions{}, buffer, static_cast<int>(allocated));
__ MovFromFloatParameter(f12);
__ sqrt_d(f0, f12);
@@ -568,12 +569,13 @@ UnaryMathFunctionWithIsolate CreateSqrtFunction(Isolate* isolate) {
__ Ret();
CodeDesc desc;
- masm.GetCode(isolate, &desc);
+ masm.GetCode(nullptr, &desc);
DCHECK(!RelocInfo::RequiresRelocationAfterCodegen(desc));
Assembler::FlushICache(buffer, allocated);
- CHECK(SetPermissions(buffer, allocated, PageAllocator::kReadExecute));
- return FUNCTION_CAST<UnaryMathFunctionWithIsolate>(buffer);
+ CHECK(SetPermissions(page_allocator, buffer, allocated,
+ PageAllocator::kReadExecute));
+ return FUNCTION_CAST<UnaryMathFunction>(buffer);
#endif
}
diff --git a/deps/v8/src/mips/disasm-mips.cc b/deps/v8/src/mips/disasm-mips.cc
index 0049f9fa91..e7ec95b7ac 100644
--- a/deps/v8/src/mips/disasm-mips.cc
+++ b/deps/v8/src/mips/disasm-mips.cc
@@ -1546,6 +1546,16 @@ void Decoder::DecodeTypeRegisterSPECIAL3(Instruction* instr) {
}
break;
}
+ case LL_R6: {
+ DCHECK(IsMipsArchVariant(kMips32r6));
+ Format(instr, "llwp 'rd, 'rt, 0('rs)");
+ break;
+ }
+ case SC_R6: {
+ DCHECK(IsMipsArchVariant(kMips32r6));
+ Format(instr, "scwp 'rd, 'rt, 0('rs)");
+ break;
+ }
default: {
sa >>= kBp2Bits;
switch (sa) {
diff --git a/deps/v8/src/mips/interface-descriptors-mips.cc b/deps/v8/src/mips/interface-descriptors-mips.cc
index 31b5f82895..1ece4812a3 100644
--- a/deps/v8/src/mips/interface-descriptors-mips.cc
+++ b/deps/v8/src/mips/interface-descriptors-mips.cc
@@ -88,9 +88,9 @@ void CallVarargsDescriptor::InitializePlatformSpecific(
CallInterfaceDescriptorData* data) {
// a0 : number of arguments (on the stack, not including receiver)
// a1 : the target to call
- // a2 : arguments list (FixedArray)
// t0 : arguments list length (untagged)
- Register registers[] = {a1, a0, a2, t0};
+ // a2 : arguments list (FixedArray)
+ Register registers[] = {a1, a0, t0, a2};
data->InitializePlatformSpecific(arraysize(registers), registers);
}
@@ -125,9 +125,9 @@ void ConstructVarargsDescriptor::InitializePlatformSpecific(
// a0 : number of arguments (on the stack, not including receiver)
// a1 : the target to call
// a3 : the new target
- // a2 : arguments list (FixedArray)
// t0 : arguments list length (untagged)
- Register registers[] = {a1, a3, a0, a2, t0};
+ // a2 : arguments list (FixedArray)
+ Register registers[] = {a1, a3, a0, t0, a2};
data->InitializePlatformSpecific(arraysize(registers), registers);
}
@@ -194,7 +194,7 @@ void BinaryOpDescriptor::InitializePlatformSpecific(
data->InitializePlatformSpecific(arraysize(registers), registers);
}
-void ArgumentAdaptorDescriptor::InitializePlatformSpecific(
+void ArgumentsAdaptorDescriptor::InitializePlatformSpecific(
CallInterfaceDescriptorData* data) {
Register registers[] = {
a1, // JSFunction
@@ -238,10 +238,10 @@ void InterpreterPushArgsThenConstructDescriptor::InitializePlatformSpecific(
CallInterfaceDescriptorData* data) {
Register registers[] = {
a0, // argument count (not including receiver)
- a3, // new target
+ t4, // address of the first argument
a1, // constructor to call
- a2, // allocation site feedback if available, undefined otherwise.
- t4 // address of the first argument
+ a3, // new target
+ a2, // allocation site feedback if available, undefined otherwise
};
data->InitializePlatformSpecific(arraysize(registers), registers);
}
diff --git a/deps/v8/src/mips/macro-assembler-mips.cc b/deps/v8/src/mips/macro-assembler-mips.cc
index 35a9959ddb..c10602df48 100644
--- a/deps/v8/src/mips/macro-assembler-mips.cc
+++ b/deps/v8/src/mips/macro-assembler-mips.cc
@@ -127,11 +127,11 @@ int TurboAssembler::PopCallerSaved(SaveFPRegsMode fp_mode, Register exclusion1,
return bytes;
}
-void TurboAssembler::LoadRoot(Register destination, Heap::RootListIndex index) {
+void TurboAssembler::LoadRoot(Register destination, RootIndex index) {
lw(destination, MemOperand(kRootRegister, RootRegisterOffset(index)));
}
-void TurboAssembler::LoadRoot(Register destination, Heap::RootListIndex index,
+void TurboAssembler::LoadRoot(Register destination, RootIndex index,
Condition cond, Register src1,
const Operand& src2) {
Branch(2, NegateCondition(cond), src1, src2);
@@ -273,8 +273,6 @@ void TurboAssembler::CallRecordWriteStub(
RecordWriteDescriptor::kObject));
Register slot_parameter(
callable.descriptor().GetRegisterParameter(RecordWriteDescriptor::kSlot));
- Register isolate_parameter(callable.descriptor().GetRegisterParameter(
- RecordWriteDescriptor::kIsolate));
Register remembered_set_parameter(callable.descriptor().GetRegisterParameter(
RecordWriteDescriptor::kRememberedSet));
Register fp_mode_parameter(callable.descriptor().GetRegisterParameter(
@@ -286,7 +284,6 @@ void TurboAssembler::CallRecordWriteStub(
Pop(slot_parameter);
Pop(object_parameter);
- li(isolate_parameter, ExternalReference::isolate_address(isolate()));
Move(remembered_set_parameter, Smi::FromEnum(remembered_set_action));
Move(fp_mode_parameter, Smi::FromEnum(fp_mode));
Call(callable.code(), RelocInfo::CODE_TARGET);
@@ -1347,6 +1344,11 @@ void TurboAssembler::li(Register dst, ExternalReference value, LiFlags mode) {
li(dst, Operand(value), mode);
}
+void TurboAssembler::li(Register dst, const StringConstantBase* string,
+ LiFlags mode) {
+ li(dst, Operand::EmbeddedStringConstant(string), mode);
+}
+
void TurboAssembler::li(Register rd, Operand j, LiFlags mode) {
DCHECK(!j.is_reg());
BlockTrampolinePoolScope block_trampoline_pool(this);
@@ -1461,6 +1463,26 @@ void TurboAssembler::SubPair(Register dst_low, Register dst_high,
Move(dst_low, scratch1);
}
+void TurboAssembler::AndPair(Register dst_low, Register dst_high,
+ Register left_low, Register left_high,
+ Register right_low, Register right_high) {
+ And(dst_low, left_low, right_low);
+ And(dst_high, left_high, right_high);
+}
+
+void TurboAssembler::OrPair(Register dst_low, Register dst_high,
+ Register left_low, Register left_high,
+ Register right_low, Register right_high) {
+ Or(dst_low, left_low, right_low);
+ Or(dst_high, left_high, right_high);
+}
+void TurboAssembler::XorPair(Register dst_low, Register dst_high,
+ Register left_low, Register left_high,
+ Register right_low, Register right_high) {
+ Xor(dst_low, left_low, right_low);
+ Xor(dst_high, left_high, right_high);
+}
+
void TurboAssembler::MulPair(Register dst_low, Register dst_high,
Register left_low, Register left_high,
Register right_low, Register right_high,
@@ -2814,7 +2836,7 @@ void TurboAssembler::Branch(Label* L, Condition cond, Register rs,
}
void TurboAssembler::Branch(Label* L, Condition cond, Register rs,
- Heap::RootListIndex index, BranchDelaySlot bdslot) {
+ RootIndex index, BranchDelaySlot bdslot) {
UseScratchRegisterScope temps(this);
Register scratch = temps.Acquire();
LoadRoot(scratch, index);
@@ -3623,8 +3645,8 @@ bool TurboAssembler::BranchAndLinkShortCheck(int32_t offset, Label* L,
void TurboAssembler::LoadFromConstantsTable(Register destination,
int constant_index) {
DCHECK(isolate()->heap()->RootCanBeTreatedAsConstant(
- Heap::kBuiltinsConstantsTableRootIndex));
- LoadRoot(destination, Heap::kBuiltinsConstantsTableRootIndex);
+ RootIndex::kBuiltinsConstantsTable));
+ LoadRoot(destination, RootIndex::kBuiltinsConstantsTable);
lw(destination,
FieldMemOperand(destination,
FixedArray::kHeaderSize + constant_index * kPointerSize));
@@ -4326,7 +4348,7 @@ void MacroAssembler::InvokeFunctionCode(Register function, Register new_target,
// Clear the new.target register if not given.
if (!new_target.is_valid()) {
- LoadRoot(a3, Heap::kUndefinedValueRootIndex);
+ LoadRoot(a3, RootIndex::kUndefinedValue);
}
Label done;
@@ -5032,7 +5054,7 @@ void MacroAssembler::AssertUndefinedOrAllocationSite(Register object,
if (emit_debug_code()) {
Label done_checking;
AssertNotSmi(object);
- LoadRoot(scratch, Heap::kUndefinedValueRootIndex);
+ LoadRoot(scratch, RootIndex::kUndefinedValue);
Branch(&done_checking, eq, object, Operand(scratch));
GetObjectType(object, scratch, scratch);
Assert(eq, AbortReason::kExpectedUndefinedOrCell, scratch,
diff --git a/deps/v8/src/mips/macro-assembler-mips.h b/deps/v8/src/mips/macro-assembler-mips.h
index f6c371923f..ae3138f85f 100644
--- a/deps/v8/src/mips/macro-assembler-mips.h
+++ b/deps/v8/src/mips/macro-assembler-mips.h
@@ -118,6 +118,9 @@ inline MemOperand CFunctionArgumentOperand(int index) {
class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
public:
+ TurboAssembler(const AssemblerOptions& options, void* buffer, int buffer_size)
+ : TurboAssemblerBase(options, buffer, buffer_size) {}
+
TurboAssembler(Isolate* isolate, const AssemblerOptions& options,
void* buffer, int buffer_size,
CodeObjectRequired create_code_object)
@@ -223,7 +226,7 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
void BranchMSA(Label* target, MSABranchDF df, MSABranchCondition cond,
MSARegister wt, BranchDelaySlot bd = PROTECT);
- void Branch(Label* L, Condition cond, Register rs, Heap::RootListIndex index,
+ void Branch(Label* L, Condition cond, Register rs, RootIndex index,
BranchDelaySlot bdslot = PROTECT);
// Load int32 in the rd register.
@@ -233,6 +236,8 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
}
void li(Register dst, Handle<HeapObject> value, LiFlags mode = OPTIMIZE_SIZE);
void li(Register dst, ExternalReference value, LiFlags mode = OPTIMIZE_SIZE);
+ void li(Register dst, const StringConstantBase* string,
+ LiFlags mode = OPTIMIZE_SIZE);
void LoadFromConstantsTable(Register destination,
int constant_index) override;
@@ -577,6 +582,15 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
Register left_high, Register right_low, Register right_high,
Register scratch1, Register scratch2);
+ void AndPair(Register dst_low, Register dst_high, Register left_low,
+ Register left_high, Register right_low, Register right_high);
+
+ void OrPair(Register dst_low, Register dst_high, Register left_low,
+ Register left_high, Register right_low, Register right_high);
+
+ void XorPair(Register dst_low, Register dst_high, Register left_low,
+ Register left_high, Register right_low, Register right_high);
+
void MulPair(Register dst_low, Register dst_high, Register left_low,
Register left_high, Register right_low, Register right_high,
Register scratch1, Register scratch2);
@@ -793,8 +807,8 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
Func GetLabelFunction);
// Load an object from the root table.
- void LoadRoot(Register destination, Heap::RootListIndex index) override;
- void LoadRoot(Register destination, Heap::RootListIndex index, Condition cond,
+ void LoadRoot(Register destination, RootIndex index) override;
+ void LoadRoot(Register destination, RootIndex index, Condition cond,
Register src1, const Operand& src2);
// If the value is a NaN, canonicalize the value else, do nothing.
@@ -901,10 +915,14 @@ class V8_EXPORT_PRIVATE TurboAssembler : public TurboAssemblerBase {
// MacroAssembler implements a collection of frequently used macros.
class MacroAssembler : public TurboAssembler {
public:
+ MacroAssembler(const AssemblerOptions& options, void* buffer, int size)
+ : TurboAssembler(options, buffer, size) {}
+
MacroAssembler(Isolate* isolate, void* buffer, int size,
CodeObjectRequired create_code_object)
: MacroAssembler(isolate, AssemblerOptions::Default(isolate), buffer,
size, create_code_object) {}
+
MacroAssembler(Isolate* isolate, const AssemblerOptions& options,
void* buffer, int size, CodeObjectRequired create_code_object);
@@ -912,7 +930,7 @@ class MacroAssembler : public TurboAssembler {
// less efficient form using xor instead of mov is emitted.
void Swap(Register reg1, Register reg2, Register scratch = no_reg);
- void PushRoot(Heap::RootListIndex index) {
+ void PushRoot(RootIndex index) {
UseScratchRegisterScope temps(this);
Register scratch = temps.Acquire();
LoadRoot(scratch, index);
@@ -920,7 +938,7 @@ class MacroAssembler : public TurboAssembler {
}
// Compare the object in a register to a value and jump if they are equal.
- void JumpIfRoot(Register with, Heap::RootListIndex index, Label* if_equal) {
+ void JumpIfRoot(Register with, RootIndex index, Label* if_equal) {
UseScratchRegisterScope temps(this);
Register scratch = temps.Acquire();
LoadRoot(scratch, index);
@@ -928,8 +946,7 @@ class MacroAssembler : public TurboAssembler {
}
// Compare the object in a register to a value and jump if they are not equal.
- void JumpIfNotRoot(Register with, Heap::RootListIndex index,
- Label* if_not_equal) {
+ void JumpIfNotRoot(Register with, RootIndex index, Label* if_not_equal) {
UseScratchRegisterScope temps(this);
Register scratch = temps.Acquire();
LoadRoot(scratch, index);
diff --git a/deps/v8/src/mips/simulator-mips.cc b/deps/v8/src/mips/simulator-mips.cc
index 13f5f38f0d..b759176db3 100644
--- a/deps/v8/src/mips/simulator-mips.cc
+++ b/deps/v8/src/mips/simulator-mips.cc
@@ -4240,6 +4240,21 @@ void Simulator::DecodeTypeRegisterSPECIAL3() {
SetResult(rd_reg(), alu_out);
break;
}
+ case LL_R6: {
+ // LLWP/SCWP sequence cannot be simulated properly
+ DCHECK(IsMipsArchVariant(kMips32r6));
+ set_register(rd_reg(), ReadW(rs() + 4, instr_.instr()));
+ set_register(rt(), ReadW(rs(), instr_.instr()));
+ break;
+ }
+ case SC_R6: {
+ // LLWP/SCWP sequence cannot be simulated properly
+ DCHECK(IsMipsArchVariant(kMips32r6));
+ WriteW(rs() + 4, rd_reg(), instr_.instr());
+ WriteW(rs(), rt(), instr_.instr());
+ set_register(rt(), 1);
+ break;
+ }
default:
UNREACHABLE();
}
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-02 09:43:40 +0000