diff options
Diffstat (limited to 'deps/v8/src/mips64/macro-assembler-mips64.h')
| -rw-r--r-- | deps/v8/src/mips64/macro-assembler-mips64.h | 144 |
1 files changed, 95 insertions, 49 deletions
diff --git a/deps/v8/src/mips64/macro-assembler-mips64.h b/deps/v8/src/mips64/macro-assembler-mips64.h index 7f44ab9cc5..401112d100 100644 --- a/deps/v8/src/mips64/macro-assembler-mips64.h +++ b/deps/v8/src/mips64/macro-assembler-mips64.h @@ -265,7 +265,8 @@ class MacroAssembler: public Assembler { void Call(Label* target); - void Move(Register dst, Smi* smi) { li(dst, Operand(smi)); } + inline void Move(Register dst, Handle<Object> handle) { li(dst, handle); } + inline void Move(Register dst, Smi* smi) { li(dst, Operand(smi)); } inline void Move(Register dst, Register src) { if (!dst.is(src)) { @@ -273,17 +274,29 @@ class MacroAssembler: public Assembler { } } - inline void Move(FPURegister dst, FPURegister src) { + inline void Move_d(FPURegister dst, FPURegister src) { if (!dst.is(src)) { mov_d(dst, src); } } + inline void Move_s(FPURegister dst, FPURegister src) { + if (!dst.is(src)) { + mov_s(dst, src); + } + } + + inline void Move(FPURegister dst, FPURegister src) { Move_d(dst, src); } + inline void Move(Register dst_low, Register dst_high, FPURegister src) { mfc1(dst_low, src); mfhc1(dst_high, src); } + inline void Move(Register dst, FPURegister src) { dmfc1(dst, src); } + + inline void Move(FPURegister dst, Register src) { dmtc1(src, dst); } + inline void FmoveHigh(Register dst_high, FPURegister src) { mfhc1(dst_high, src); } @@ -312,6 +325,17 @@ class MacroAssembler: public Assembler { void Movt(Register rd, Register rs, uint16_t cc = 0); void Movf(Register rd, Register rs, uint16_t cc = 0); + // Min, Max macros. + // On pre-r6 these functions may modify at and t8 registers. + void MinNaNCheck_d(FPURegister dst, FPURegister src1, FPURegister src2, + Label* nan = nullptr); + void MaxNaNCheck_d(FPURegister dst, FPURegister src1, FPURegister src2, + Label* nan = nullptr); + void MinNaNCheck_s(FPURegister dst, FPURegister src1, FPURegister src2, + Label* nan = nullptr); + void MaxNaNCheck_s(FPURegister dst, FPURegister src1, FPURegister src2, + Label* nan = nullptr); + void Clz(Register rd, Register rs); // Jump unconditionally to given label. @@ -676,6 +700,9 @@ class MacroAssembler: public Assembler { #undef DEFINE_INSTRUCTION2 #undef DEFINE_INSTRUCTION3 + // Load Scaled Address instructions. Parameter sa (shift argument) must be + // between [1, 31] (inclusive). On pre-r6 architectures the scratch register + // may be clobbered. void Lsa(Register rd, Register rs, Register rt, uint8_t sa, Register scratch = at); void Dlsa(Register rd, Register rs, Register rt, uint8_t sa, @@ -803,6 +830,14 @@ class MacroAssembler: public Assembler { Daddu(sp, sp, Operand(count * kPointerSize)); } + // Push a fixed frame, consisting of ra, fp. + void PushCommonFrame(Register marker_reg = no_reg); + + // Push a standard frame, consisting of ra, fp, context and JS function. + void PushStandardFrame(Register function_reg); + + void PopCommonFrame(Register marker_reg = no_reg); + // Push and pop the registers that can hold pointers, as defined by the // RegList constant kSafepointSavedRegisters. void PushSafepointRegisters(); @@ -1053,6 +1088,15 @@ class MacroAssembler: public Assembler { // ------------------------------------------------------------------------- // JavaScript invokes. + // Removes current frame and its arguments from the stack preserving + // the arguments and a return address pushed to the stack for the next call. + // Both |callee_args_count| and |caller_args_count_reg| do not include + // receiver. |callee_args_count| is not modified, |caller_args_count_reg| + // is trashed. + void PrepareForTailCall(const ParameterCount& callee_args_count, + Register caller_args_count_reg, Register scratch0, + Register scratch1); + // Invoke the JavaScript function code by either calling or jumping. void InvokeFunctionCode(Register function, Register new_target, const ParameterCount& expected, @@ -1277,32 +1321,41 @@ class MacroAssembler: public Assembler { // Usage: first call the appropriate arithmetic function, then call one of the // jump functions with the overflow_dst register as the second parameter. - void AdduAndCheckForOverflow(Register dst, - Register left, - Register right, - Register overflow_dst, - Register scratch = at); + inline void AddBranchOvf(Register dst, Register left, const Operand& right, + Label* overflow_label, Register scratch = at) { + AddBranchOvf(dst, left, right, overflow_label, nullptr, scratch); + } + + inline void AddBranchNoOvf(Register dst, Register left, const Operand& right, + Label* no_overflow_label, Register scratch = at) { + AddBranchOvf(dst, left, right, nullptr, no_overflow_label, scratch); + } - void AdduAndCheckForOverflow(Register dst, Register left, - const Operand& right, Register overflow_dst, - Register scratch); + void AddBranchOvf(Register dst, Register left, const Operand& right, + Label* overflow_label, Label* no_overflow_label, + Register scratch = at); - void SubuAndCheckForOverflow(Register dst, - Register left, - Register right, - Register overflow_dst, - Register scratch = at); + void AddBranchOvf(Register dst, Register left, Register right, + Label* overflow_label, Label* no_overflow_label, + Register scratch = at); - void SubuAndCheckForOverflow(Register dst, Register left, - const Operand& right, Register overflow_dst, - Register scratch); + inline void SubBranchOvf(Register dst, Register left, const Operand& right, + Label* overflow_label, Register scratch = at) { + SubBranchOvf(dst, left, right, overflow_label, nullptr, scratch); + } - void DadduAndCheckForOverflow(Register dst, Register left, Register right, - Register overflow_dst, Register scratch = at); + inline void SubBranchNoOvf(Register dst, Register left, const Operand& right, + Label* no_overflow_label, Register scratch = at) { + SubBranchOvf(dst, left, right, nullptr, no_overflow_label, scratch); + } - void DadduAndCheckForOverflow(Register dst, Register left, - const Operand& right, Register overflow_dst, - Register scratch); + void SubBranchOvf(Register dst, Register left, const Operand& right, + Label* overflow_label, Label* no_overflow_label, + Register scratch = at); + + void SubBranchOvf(Register dst, Register left, Register right, + Label* overflow_label, Label* no_overflow_label, + Register scratch = at); inline void DaddBranchOvf(Register dst, Register left, const Operand& right, Label* overflow_label, Register scratch = at) { @@ -1322,13 +1375,6 @@ class MacroAssembler: public Assembler { Label* overflow_label, Label* no_overflow_label, Register scratch = at); - void DsubuAndCheckForOverflow(Register dst, Register left, Register right, - Register overflow_dst, Register scratch = at); - - void DsubuAndCheckForOverflow(Register dst, Register left, - const Operand& right, Register overflow_dst, - Register scratch); - inline void DsubBranchOvf(Register dst, Register left, const Operand& right, Label* overflow_label, Register scratch = at) { DsubBranchOvf(dst, left, right, overflow_label, nullptr, scratch); @@ -1648,6 +1694,9 @@ const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT // Jump if either of the registers contain a smi. void JumpIfEitherSmi(Register reg1, Register reg2, Label* on_either_smi); + // Abort execution if argument is a number, enabled via --debug-code. + void AssertNotNumber(Register object); + // Abort execution if argument is a smi, enabled via --debug-code. void AssertNotSmi(Register object); void AssertSmi(Register object); @@ -1758,7 +1807,7 @@ const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT DecodeField<Field>(reg, reg); } // Generates function and stub prologue code. - void StubPrologue(); + void StubPrologue(StackFrame::Type type); void Prologue(bool code_pre_aging); // Load the type feedback vector from a JavaScript frame. @@ -1773,25 +1822,22 @@ const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT // in a0. Assumes that any other register can be used as a scratch. void CheckEnumCache(Label* call_runtime); - // AllocationMemento support. Arrays may have an associated - // AllocationMemento object that can be checked for in order to pretransition - // to another type. - // On entry, receiver_reg should point to the array object. - // scratch_reg gets clobbered. - // If allocation info is present, jump to allocation_memento_present. - void TestJSArrayForAllocationMemento( - Register receiver_reg, - Register scratch_reg, - Label* no_memento_found, - Condition cond = al, - Label* allocation_memento_present = NULL); + // AllocationMemento support. Arrays may have an associated AllocationMemento + // object that can be checked for in order to pretransition to another type. + // On entry, receiver_reg should point to the array object. scratch_reg gets + // clobbered. If no info is present jump to no_memento_found, otherwise fall + // through. + void TestJSArrayForAllocationMemento(Register receiver_reg, + Register scratch_reg, + Label* no_memento_found); void JumpIfJSArrayHasAllocationMemento(Register receiver_reg, Register scratch_reg, Label* memento_found) { Label no_memento_found; TestJSArrayForAllocationMemento(receiver_reg, scratch_reg, - &no_memento_found, eq, memento_found); + &no_memento_found); + Branch(memento_found); bind(&no_memento_found); } @@ -1832,8 +1878,6 @@ const Operand& rt = Operand(zero_reg), BranchDelaySlot bd = PROTECT BranchDelaySlot bdslot); void BranchLong(Label* L, BranchDelaySlot bdslot); void BranchAndLinkLong(Label* L, BranchDelaySlot bdslot); - void Jr(Label* L, BranchDelaySlot bdslot); - void Jalr(Label* L, BranchDelaySlot bdslot); // Common implementation of BranchF functions for the different formats. void BranchFCommon(SecondaryField sizeField, Label* target, Label* nan, @@ -1936,17 +1980,19 @@ void MacroAssembler::GenerateSwitchTable(Register index, size_t case_count, nop(); } addiupc(at, 5); - dlsa(at, at, index, kPointerSizeLog2); + Dlsa(at, at, index, kPointerSizeLog2); ld(at, MemOperand(at)); } else { Label here; - BlockTrampolinePoolFor(static_cast<int>(case_count) * 2 + 7); + BlockTrampolinePoolFor(static_cast<int>(case_count) * 2 + 11); Align(8); + push(ra); bal(&here); dsll(at, index, kPointerSizeLog2); // Branch delay slot. bind(&here); daddu(at, at, ra); - ld(at, MemOperand(at, 4 * v8::internal::Assembler::kInstrSize)); + pop(ra); + ld(at, MemOperand(at, 6 * v8::internal::Assembler::kInstrSize)); } jr(at); nop(); // Branch delay slot nop. |