diff options
Diffstat (limited to 'deps/v8/src/mips64/constants-mips64.cc')
-rw-r--r-- | deps/v8/src/mips64/constants-mips64.cc | 185 |
1 files changed, 0 insertions, 185 deletions
diff --git a/deps/v8/src/mips64/constants-mips64.cc b/deps/v8/src/mips64/constants-mips64.cc index b43601c5cf..efabfe4f26 100644 --- a/deps/v8/src/mips64/constants-mips64.cc +++ b/deps/v8/src/mips64/constants-mips64.cc @@ -219,191 +219,6 @@ bool Instruction::IsTrap() const { } -Instruction::Type Instruction::InstructionType() const { - switch (OpcodeFieldRaw()) { - case SPECIAL: - switch (FunctionFieldRaw()) { - case JR: - case JALR: - case BREAK: - case SLL: - case DSLL: - case DSLL32: - case SRL: - case DSRL: - case DSRL32: - case SRA: - case DSRA: - case DSRA32: - case SLLV: - case DSLLV: - case SRLV: - case DSRLV: - case SRAV: - case DSRAV: - case MFHI: - case MFLO: - case MULT: - case DMULT: - case MULTU: - case DMULTU: - case DIV: - case DDIV: - case DIVU: - case DDIVU: - case ADD: - case DADD: - case ADDU: - case DADDU: - case SUB: - case DSUB: - case SUBU: - case DSUBU: - case AND: - case OR: - case XOR: - case NOR: - case SLT: - case SLTU: - case TGE: - case TGEU: - case TLT: - case TLTU: - case TEQ: - case TNE: - case MOVZ: - case MOVN: - case MOVCI: - case SELEQZ_S: - case SELNEZ_S: - return kRegisterType; - default: - return kUnsupported; - } - break; - case SPECIAL2: - switch (FunctionFieldRaw()) { - case MUL: - case CLZ: - return kRegisterType; - default: - return kUnsupported; - } - break; - case SPECIAL3: - switch (FunctionFieldRaw()) { - case INS: - case EXT: - case DEXT: - return kRegisterType; - case BSHFL: { - int sa = SaFieldRaw() >> kSaShift; - switch (sa) { - case BITSWAP: - return kRegisterType; - case WSBH: - case SEB: - case SEH: - return kUnsupported; - } - sa >>= kBp2Bits; - switch (sa) { - case ALIGN: - return kRegisterType; - default: - return kUnsupported; - } - } - case DBSHFL: { - int sa = SaFieldRaw() >> kSaShift; - switch (sa) { - case DBITSWAP: - return kRegisterType; - case DSBH: - case DSHD: - return kUnsupported; - } - sa = SaFieldRaw() >> kSaShift; - sa >>= kBp3Bits; - switch (sa) { - case DALIGN: - return kRegisterType; - default: - return kUnsupported; - } - } - default: - return kUnsupported; - } - break; - case COP1: // Coprocessor instructions. - switch (RsFieldRawNoAssert()) { - case BC1: // Branch on coprocessor condition. - case BC1EQZ: - case BC1NEZ: - return kImmediateType; - default: - return kRegisterType; - } - break; - case COP1X: - return kRegisterType; - // 16 bits Immediate type instructions. e.g.: addi dest, src, imm16. - case REGIMM: - case BEQ: - case BNE: - case BLEZ: - case BGTZ: - case ADDI: - case DADDI: - case ADDIU: - case DADDIU: - case SLTI: - case SLTIU: - case ANDI: - case ORI: - case XORI: - case LUI: - case BEQL: - case BNEL: - case BLEZL: - case BGTZL: - case POP66: - case POP76: - case LB: - case LH: - case LWL: - case LW: - case LWU: - case LD: - case LBU: - case LHU: - case LWR: - case SB: - case SH: - case SWL: - case SW: - case SD: - case SWR: - case LWC1: - case LDC1: - case SWC1: - case SDC1: - case PCREL: - case BC: - case BALC: - return kImmediateType; - // 26 bits immediate type instructions. e.g.: j imm26. - case J: - case JAL: - return kJumpType; - default: - return kUnsupported; - } - return kUnsupported; -} - - } // namespace internal } // namespace v8 |