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Diffstat (limited to 'deps/v8/src/mips/simulator-mips.h')
-rw-r--r--deps/v8/src/mips/simulator-mips.h46
1 files changed, 45 insertions, 1 deletions
diff --git a/deps/v8/src/mips/simulator-mips.h b/deps/v8/src/mips/simulator-mips.h
index 85f64779f1..a135f8d71d 100644
--- a/deps/v8/src/mips/simulator-mips.h
+++ b/deps/v8/src/mips/simulator-mips.h
@@ -175,8 +175,11 @@ class Simulator {
double get_fpu_register_double(int fpureg) const;
void set_fcsr_bit(uint32_t cc, bool value);
bool test_fcsr_bit(uint32_t cc);
+ void set_fcsr_rounding_mode(FPURoundingMode mode);
+ unsigned int get_fcsr_rounding_mode();
bool set_fcsr_round_error(double original, double rounded);
-
+ void round_according_to_fcsr(double toRound, double& rounded,
+ int32_t& rounded_int, double fs);
// Special case of set_register and get_register to access the raw PC value.
void set_pc(int32_t value);
int32_t get_pc() const;
@@ -265,6 +268,47 @@ class Simulator {
// Executing is handled based on the instruction type.
void DecodeTypeRegister(Instruction* instr);
+ // Called from DecodeTypeRegisterCOP1
+ void DecodeTypeRegisterDRsType(Instruction* instr, const int32_t& fr_reg,
+ const int32_t& fs_reg, const int32_t& ft_reg,
+ const int32_t& fd_reg);
+ void DecodeTypeRegisterWRsType(Instruction* instr, int32_t& alu_out,
+ const int32_t& fd_reg, const int32_t& fs_reg);
+ void DecodeTypeRegisterSRsType(Instruction* instr, const int32_t& ft_reg,
+ const int32_t& fs_reg, const int32_t& fd_reg);
+ void DecodeTypeRegisterLRsType(Instruction* instr, const int32_t& ft_reg,
+ const int32_t& fs_reg, const int32_t& fd_reg);
+
+ // Functions called from DeocodeTypeRegister
+ void DecodeTypeRegisterCOP1(
+ Instruction* instr, const int32_t& rs_reg, const int32_t& rs,
+ const uint32_t& rs_u, const int32_t& rt_reg, const int32_t& rt,
+ const uint32_t& rt_u, const int32_t& rd_reg, const int32_t& fr_reg,
+ const int32_t& fs_reg, const int32_t& ft_reg, const int32_t& fd_reg,
+ int64_t& i64hilo, uint64_t& u64hilo, int32_t& alu_out, bool& do_interrupt,
+ int32_t& current_pc, int32_t& next_pc, int32_t& return_addr_reg);
+
+
+ void DecodeTypeRegisterCOP1X(Instruction* instr, const int32_t& fr_reg,
+ const int32_t& fs_reg, const int32_t& ft_reg,
+ const int32_t& fd_reg);
+
+
+ void DecodeTypeRegisterSPECIAL(
+ Instruction* instr, const int32_t& rs_reg, const int32_t& rs,
+ const uint32_t& rs_u, const int32_t& rt_reg, const int32_t& rt,
+ const uint32_t& rt_u, const int32_t& rd_reg, const int32_t& fr_reg,
+ const int32_t& fs_reg, const int32_t& ft_reg, const int32_t& fd_reg,
+ int64_t& i64hilo, uint64_t& u64hilo, int32_t& alu_out, bool& do_interrupt,
+ int32_t& current_pc, int32_t& next_pc, int32_t& return_addr_reg);
+
+
+ void DecodeTypeRegisterSPECIAL2(Instruction* instr, const int32_t& rd_reg,
+ int32_t& alu_out);
+
+ void DecodeTypeRegisterSPECIAL3(Instruction* instr, const int32_t& rt_reg,
+ int32_t& alu_out);
+
// Helper function for DecodeTypeRegister.
void ConfigureTypeRegister(Instruction* instr,
int32_t* alu_out,