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Diffstat (limited to 'deps/v8/src/ia32/disasm-ia32.cc')
-rw-r--r--deps/v8/src/ia32/disasm-ia32.cc60
1 files changed, 44 insertions, 16 deletions
diff --git a/deps/v8/src/ia32/disasm-ia32.cc b/deps/v8/src/ia32/disasm-ia32.cc
index 789e7ba9fe..36acd1e05d 100644
--- a/deps/v8/src/ia32/disasm-ia32.cc
+++ b/deps/v8/src/ia32/disasm-ia32.cc
@@ -868,6 +868,10 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
NameOfXMMRegister(vvvv));
current += PrintRightXMMOperand(current);
break;
+ case 0x5b:
+ AppendToBuffer("vcvttps2dq %s,", NameOfXMMRegister(regop));
+ current += PrintRightXMMOperand(current);
+ break;
case 0x5c:
AppendToBuffer("vsubss %s,%s,", NameOfXMMRegister(regop),
NameOfXMMRegister(vvvv));
@@ -988,6 +992,14 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
int mod, regop, rm, vvvv = vex_vreg();
get_modrm(*current, &mod, &regop, &rm);
switch (opcode) {
+ case 0x52:
+ AppendToBuffer("vrsqrtps %s,", NameOfXMMRegister(regop));
+ current += PrintRightXMMOperand(current);
+ break;
+ case 0x53:
+ AppendToBuffer("vrcpps %s,", NameOfXMMRegister(regop));
+ current += PrintRightXMMOperand(current);
+ break;
case 0x54:
AppendToBuffer("vandps %s,%s,", NameOfXMMRegister(regop),
NameOfXMMRegister(vvvv));
@@ -1008,6 +1020,10 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
NameOfXMMRegister(vvvv));
current += PrintRightXMMOperand(current);
break;
+ case 0x5B:
+ AppendToBuffer("vcvtdq2ps %s,", NameOfXMMRegister(regop));
+ current += PrintRightXMMOperand(current);
+ break;
case 0x5C:
AppendToBuffer("vsubps %s,%s,", NameOfXMMRegister(regop),
NameOfXMMRegister(vvvv));
@@ -1028,6 +1044,16 @@ int DisassemblerIA32::AVXInstruction(byte* data) {
NameOfXMMRegister(vvvv));
current += PrintRightXMMOperand(current);
break;
+ case 0xC2: {
+ const char* const pseudo_op[] = {"eq", "lt", "le", "unord",
+ "neq", "nlt", "nle", "ord"};
+ AppendToBuffer("vcmpps %s,%s,", NameOfXMMRegister(regop),
+ NameOfXMMRegister(vvvv));
+ current += PrintRightXMMOperand(current);
+ AppendToBuffer(", (%s)", pseudo_op[*current]);
+ current++;
+ break;
+ }
default:
UnimplementedInstruction();
}
@@ -1537,28 +1563,17 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
get_modrm(*data, &mod, &regop, &rm);
AppendToBuffer("ucomiss %s,", NameOfXMMRegister(regop));
data += PrintRightXMMOperand(data);
- } else if (f0byte >= 0x53 && f0byte <= 0x5F) {
+ } else if (f0byte >= 0x52 && f0byte <= 0x5F) {
const char* const pseudo_op[] = {
- "rcpps",
- "andps",
- "andnps",
- "orps",
- "xorps",
- "addps",
- "mulps",
- "cvtps2pd",
- "cvtdq2ps",
- "subps",
- "minps",
- "divps",
- "maxps",
+ "rsqrtps", "rcpps", "andps", "andnps", "orps",
+ "xorps", "addps", "mulps", "cvtps2pd", "cvtdq2ps",
+ "subps", "minps", "divps", "maxps",
};
data += 2;
int mod, regop, rm;
get_modrm(*data, &mod, &regop, &rm);
- AppendToBuffer("%s %s,",
- pseudo_op[f0byte - 0x53],
+ AppendToBuffer("%s %s,", pseudo_op[f0byte - 0x52],
NameOfXMMRegister(regop));
data += PrintRightXMMOperand(data);
} else if (f0byte == 0x50) {
@@ -1569,6 +1584,16 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
NameOfCPURegister(regop),
NameOfXMMRegister(rm));
data++;
+ } else if (f0byte == 0xC2) {
+ data += 2;
+ int mod, regop, rm;
+ get_modrm(*data, &mod, &regop, &rm);
+ const char* const pseudo_op[] = {"eq", "lt", "le", "unord",
+ "neq", "nlt", "nle", "ord"};
+ AppendToBuffer("cmpps %s, ", NameOfXMMRegister(regop));
+ data += PrintRightXMMOperand(data);
+ AppendToBuffer(", (%s)", pseudo_op[*data]);
+ data++;
} else if (f0byte== 0xC6) {
// shufps xmm, xmm/m128, imm8
data += 2;
@@ -2246,6 +2271,9 @@ int DisassemblerIA32::InstructionDecode(v8::internal::Vector<char> out_buffer,
case 0x59:
mnem = "mulss";
break;
+ case 0x5B:
+ mnem = "cvttps2dq";
+ break;
case 0x5C:
mnem = "subss";
break;