diff options
Diffstat (limited to 'deps/v8/src/compiler/ia32/instruction-selector-ia32.cc')
| -rw-r--r-- | deps/v8/src/compiler/ia32/instruction-selector-ia32.cc | 218 |
1 files changed, 134 insertions, 84 deletions
diff --git a/deps/v8/src/compiler/ia32/instruction-selector-ia32.cc b/deps/v8/src/compiler/ia32/instruction-selector-ia32.cc index 8225c96b12..090645212e 100644 --- a/deps/v8/src/compiler/ia32/instruction-selector-ia32.cc +++ b/deps/v8/src/compiler/ia32/instruction-selector-ia32.cc @@ -50,18 +50,18 @@ class IA32OperandGenerator final : public OperandGenerator { InstructionOperand inputs[], size_t* input_count) { AddressingMode mode = kMode_MRI; - int32_t displacement = (displacement_node == NULL) + int32_t displacement = (displacement_node == nullptr) ? 0 : OpParameter<int32_t>(displacement_node); - if (base != NULL) { + if (base != nullptr) { if (base->opcode() == IrOpcode::kInt32Constant) { displacement += OpParameter<int32_t>(base); - base = NULL; + base = nullptr; } } - if (base != NULL) { + if (base != nullptr) { inputs[(*input_count)++] = UseRegister(base); - if (index != NULL) { + if (index != nullptr) { DCHECK(scale >= 0 && scale <= 3); inputs[(*input_count)++] = UseRegister(index); if (displacement != 0) { @@ -84,7 +84,7 @@ class IA32OperandGenerator final : public OperandGenerator { } } else { DCHECK(scale >= 0 && scale <= 3); - if (index != NULL) { + if (index != nullptr) { inputs[(*input_count)++] = UseRegister(index); if (displacement != 0) { inputs[(*input_count)++] = TempImmediate(displacement); @@ -109,7 +109,7 @@ class IA32OperandGenerator final : public OperandGenerator { size_t* input_count) { BaseWithIndexAndDisplacement32Matcher m(node, true); DCHECK(m.matches()); - if ((m.displacement() == NULL || CanBeImmediate(m.displacement()))) { + if ((m.displacement() == nullptr || CanBeImmediate(m.displacement()))) { return GenerateMemoryOperandInputs(m.index(), m.scale(), m.base(), m.displacement(), inputs, input_count); } else { @@ -169,29 +169,29 @@ void VisitFloatUnop(InstructionSelector* selector, Node* node, Node* input, void InstructionSelector::VisitLoad(Node* node) { - MachineType rep = RepresentationOf(OpParameter<LoadRepresentation>(node)); - MachineType typ = TypeOf(OpParameter<LoadRepresentation>(node)); + LoadRepresentation load_rep = LoadRepresentationOf(node->op()); - ArchOpcode opcode; - switch (rep) { - case kRepFloat32: + ArchOpcode opcode = kArchNop; + switch (load_rep.representation()) { + case MachineRepresentation::kFloat32: opcode = kIA32Movss; break; - case kRepFloat64: + case MachineRepresentation::kFloat64: opcode = kIA32Movsd; break; - case kRepBit: // Fall through. - case kRepWord8: - opcode = typ == kTypeInt32 ? kIA32Movsxbl : kIA32Movzxbl; + case MachineRepresentation::kBit: // Fall through. + case MachineRepresentation::kWord8: + opcode = load_rep.IsSigned() ? kIA32Movsxbl : kIA32Movzxbl; break; - case kRepWord16: - opcode = typ == kTypeInt32 ? kIA32Movsxwl : kIA32Movzxwl; + case MachineRepresentation::kWord16: + opcode = load_rep.IsSigned() ? kIA32Movsxwl : kIA32Movzxwl; break; - case kRepTagged: // Fall through. - case kRepWord32: + case MachineRepresentation::kTagged: // Fall through. + case MachineRepresentation::kWord32: opcode = kIA32Movl; break; - default: + case MachineRepresentation::kWord64: // Fall through. + case MachineRepresentation::kNone: UNREACHABLE(); return; } @@ -214,12 +214,12 @@ void InstructionSelector::VisitStore(Node* node) { Node* index = node->InputAt(1); Node* value = node->InputAt(2); - StoreRepresentation store_rep = OpParameter<StoreRepresentation>(node); + StoreRepresentation store_rep = StoreRepresentationOf(node->op()); WriteBarrierKind write_barrier_kind = store_rep.write_barrier_kind(); - MachineType rep = RepresentationOf(store_rep.machine_type()); + MachineRepresentation rep = store_rep.representation(); if (write_barrier_kind != kNoWriteBarrier) { - DCHECK_EQ(kRepTagged, rep); + DCHECK_EQ(MachineRepresentation::kTagged, rep); AddressingMode addressing_mode; InstructionOperand inputs[3]; size_t input_count = 0; @@ -256,26 +256,27 @@ void InstructionSelector::VisitStore(Node* node) { code |= MiscField::encode(static_cast<int>(record_write_mode)); Emit(code, 0, nullptr, input_count, inputs, temp_count, temps); } else { - ArchOpcode opcode; + ArchOpcode opcode = kArchNop; switch (rep) { - case kRepFloat32: + case MachineRepresentation::kFloat32: opcode = kIA32Movss; break; - case kRepFloat64: + case MachineRepresentation::kFloat64: opcode = kIA32Movsd; break; - case kRepBit: // Fall through. - case kRepWord8: + case MachineRepresentation::kBit: // Fall through. + case MachineRepresentation::kWord8: opcode = kIA32Movb; break; - case kRepWord16: + case MachineRepresentation::kWord16: opcode = kIA32Movw; break; - case kRepTagged: // Fall through. - case kRepWord32: + case MachineRepresentation::kTagged: // Fall through. + case MachineRepresentation::kWord32: opcode = kIA32Movl; break; - default: + case MachineRepresentation::kWord64: // Fall through. + case MachineRepresentation::kNone: UNREACHABLE(); return; } @@ -283,7 +284,8 @@ void InstructionSelector::VisitStore(Node* node) { InstructionOperand val; if (g.CanBeImmediate(value)) { val = g.UseImmediate(value); - } else if (rep == kRepWord8 || rep == kRepBit) { + } else if (rep == MachineRepresentation::kWord8 || + rep == MachineRepresentation::kBit) { val = g.UseByteRegister(value); } else { val = g.UseRegister(value); @@ -296,36 +298,39 @@ void InstructionSelector::VisitStore(Node* node) { InstructionCode code = opcode | AddressingModeField::encode(addressing_mode); inputs[input_count++] = val; - Emit(code, 0, static_cast<InstructionOperand*>(NULL), input_count, inputs); + Emit(code, 0, static_cast<InstructionOperand*>(nullptr), input_count, + inputs); } } void InstructionSelector::VisitCheckedLoad(Node* node) { - MachineType rep = RepresentationOf(OpParameter<MachineType>(node)); - MachineType typ = TypeOf(OpParameter<MachineType>(node)); + CheckedLoadRepresentation load_rep = CheckedLoadRepresentationOf(node->op()); IA32OperandGenerator g(this); Node* const buffer = node->InputAt(0); Node* const offset = node->InputAt(1); Node* const length = node->InputAt(2); - ArchOpcode opcode; - switch (rep) { - case kRepWord8: - opcode = typ == kTypeInt32 ? kCheckedLoadInt8 : kCheckedLoadUint8; + ArchOpcode opcode = kArchNop; + switch (load_rep.representation()) { + case MachineRepresentation::kWord8: + opcode = load_rep.IsSigned() ? kCheckedLoadInt8 : kCheckedLoadUint8; break; - case kRepWord16: - opcode = typ == kTypeInt32 ? kCheckedLoadInt16 : kCheckedLoadUint16; + case MachineRepresentation::kWord16: + opcode = load_rep.IsSigned() ? kCheckedLoadInt16 : kCheckedLoadUint16; break; - case kRepWord32: + case MachineRepresentation::kWord32: opcode = kCheckedLoadWord32; break; - case kRepFloat32: + case MachineRepresentation::kFloat32: opcode = kCheckedLoadFloat32; break; - case kRepFloat64: + case MachineRepresentation::kFloat64: opcode = kCheckedLoadFloat64; break; - default: + case MachineRepresentation::kBit: // Fall through. + case MachineRepresentation::kTagged: // Fall through. + case MachineRepresentation::kWord64: // Fall through. + case MachineRepresentation::kNone: UNREACHABLE(); return; } @@ -345,38 +350,42 @@ void InstructionSelector::VisitCheckedLoad(Node* node) { void InstructionSelector::VisitCheckedStore(Node* node) { - MachineType rep = RepresentationOf(OpParameter<MachineType>(node)); + MachineRepresentation rep = CheckedStoreRepresentationOf(node->op()); IA32OperandGenerator g(this); Node* const buffer = node->InputAt(0); Node* const offset = node->InputAt(1); Node* const length = node->InputAt(2); Node* const value = node->InputAt(3); - ArchOpcode opcode; + ArchOpcode opcode = kArchNop; switch (rep) { - case kRepWord8: + case MachineRepresentation::kWord8: opcode = kCheckedStoreWord8; break; - case kRepWord16: + case MachineRepresentation::kWord16: opcode = kCheckedStoreWord16; break; - case kRepWord32: + case MachineRepresentation::kWord32: opcode = kCheckedStoreWord32; break; - case kRepFloat32: + case MachineRepresentation::kFloat32: opcode = kCheckedStoreFloat32; break; - case kRepFloat64: + case MachineRepresentation::kFloat64: opcode = kCheckedStoreFloat64; break; - default: + case MachineRepresentation::kBit: // Fall through. + case MachineRepresentation::kTagged: // Fall through. + case MachineRepresentation::kWord64: // Fall through. + case MachineRepresentation::kNone: UNREACHABLE(); return; } InstructionOperand value_operand = - g.CanBeImmediate(value) - ? g.UseImmediate(value) - : ((rep == kRepWord8 || rep == kRepBit) ? g.UseByteRegister(value) - : g.UseRegister(value)); + g.CanBeImmediate(value) ? g.UseImmediate(value) + : ((rep == MachineRepresentation::kWord8 || + rep == MachineRepresentation::kBit) + ? g.UseByteRegister(value) + : g.UseRegister(value)); InstructionOperand offset_operand = g.UseRegister(offset); InstructionOperand length_operand = g.CanBeImmediate(length) ? g.UseImmediate(length) : g.UseRegister(length); @@ -547,8 +556,8 @@ void InstructionSelector::VisitWord32Shl(Node* node) { Int32ScaleMatcher m(node, true); if (m.matches()) { Node* index = node->InputAt(0); - Node* base = m.power_of_two_plus_one() ? index : NULL; - EmitLea(this, node, index, m.scale(), base, NULL); + Node* base = m.power_of_two_plus_one() ? index : nullptr; + EmitLea(this, node, index, m.scale(), base, nullptr); return; } VisitShift(this, node, kIA32Shl); @@ -594,7 +603,7 @@ void InstructionSelector::VisitInt32Add(Node* node) { // Try to match the Add to a lea pattern BaseWithIndexAndDisplacement32Matcher m(node); if (m.matches() && - (m.displacement() == NULL || g.CanBeImmediate(m.displacement()))) { + (m.displacement() == nullptr || g.CanBeImmediate(m.displacement()))) { InstructionOperand inputs[4]; size_t input_count = 0; AddressingMode mode = g.GenerateMemoryOperandInputs( @@ -631,8 +640,8 @@ void InstructionSelector::VisitInt32Mul(Node* node) { Int32ScaleMatcher m(node, true); if (m.matches()) { Node* index = node->InputAt(0); - Node* base = m.power_of_two_plus_one() ? index : NULL; - EmitLea(this, node, index, m.scale(), base, NULL); + Node* base = m.power_of_two_plus_one() ? index : nullptr; + EmitLea(this, node, index, m.scale(), base, nullptr); return; } IA32OperandGenerator g(this); @@ -851,11 +860,31 @@ void InstructionSelector::VisitFloat64Sqrt(Node* node) { } +void InstructionSelector::VisitFloat32RoundDown(Node* node) { + VisitRR(this, node, kSSEFloat32Round | MiscField::encode(kRoundDown)); +} + + void InstructionSelector::VisitFloat64RoundDown(Node* node) { VisitRR(this, node, kSSEFloat64Round | MiscField::encode(kRoundDown)); } +void InstructionSelector::VisitFloat32RoundUp(Node* node) { + VisitRR(this, node, kSSEFloat32Round | MiscField::encode(kRoundUp)); +} + + +void InstructionSelector::VisitFloat64RoundUp(Node* node) { + VisitRR(this, node, kSSEFloat64Round | MiscField::encode(kRoundUp)); +} + + +void InstructionSelector::VisitFloat32RoundTruncate(Node* node) { + VisitRR(this, node, kSSEFloat32Round | MiscField::encode(kRoundToZero)); +} + + void InstructionSelector::VisitFloat64RoundTruncate(Node* node) { VisitRR(this, node, kSSEFloat64Round | MiscField::encode(kRoundToZero)); } @@ -866,9 +895,19 @@ void InstructionSelector::VisitFloat64RoundTiesAway(Node* node) { } -void InstructionSelector::EmitPrepareArguments(NodeVector* arguments, - const CallDescriptor* descriptor, - Node* node) { +void InstructionSelector::VisitFloat32RoundTiesEven(Node* node) { + VisitRR(this, node, kSSEFloat32Round | MiscField::encode(kRoundToNearest)); +} + + +void InstructionSelector::VisitFloat64RoundTiesEven(Node* node) { + VisitRR(this, node, kSSEFloat64Round | MiscField::encode(kRoundToNearest)); +} + + +void InstructionSelector::EmitPrepareArguments( + ZoneVector<PushParameter>* arguments, const CallDescriptor* descriptor, + Node* node) { IA32OperandGenerator g(this); // Prepare for C function call. @@ -881,29 +920,34 @@ void InstructionSelector::EmitPrepareArguments(NodeVector* arguments, // Poke any stack arguments. for (size_t n = 0; n < arguments->size(); ++n) { - if (Node* input = (*arguments)[n]) { + PushParameter input = (*arguments)[n]; + if (input.node()) { int const slot = static_cast<int>(n); InstructionOperand value = g.CanBeImmediate(node) - ? g.UseImmediate(input) - : g.UseRegister(input); + ? g.UseImmediate(input.node()) + : g.UseRegister(input.node()); Emit(kIA32Poke | MiscField::encode(slot), g.NoOutput(), value); } } } else { // Push any stack arguments. - for (Node* input : base::Reversed(*arguments)) { + for (PushParameter input : base::Reversed(*arguments)) { // Skip any alignment holes in pushed nodes. - if (input == nullptr) continue; - // TODO(titzer): IA32Push cannot handle stack->stack double moves - // because there is no way to encode fixed double slots. + if (input.node() == nullptr) continue; InstructionOperand value = - g.CanBeImmediate(input) - ? g.UseImmediate(input) + g.CanBeImmediate(input.node()) + ? g.UseImmediate(input.node()) : IsSupported(ATOM) || - sequence()->IsFloat(GetVirtualRegister(input)) - ? g.UseRegister(input) - : g.Use(input); - Emit(kIA32Push, g.NoOutput(), value); + sequence()->IsFloat(GetVirtualRegister(input.node())) + ? g.UseRegister(input.node()) + : g.Use(input.node()); + if (input.type() == MachineType::Float32()) { + Emit(kIA32PushFloat32, g.NoOutput(), value); + } else if (input.type() == MachineType::Float64()) { + Emit(kIA32PushFloat64, g.NoOutput(), value); + } else { + Emit(kIA32Push, g.NoOutput(), value); + } } } } @@ -1061,12 +1105,12 @@ void VisitWordCompareZero(InstructionSelector* selector, Node* user, if (ProjectionIndexOf(value->op()) == 1u) { // We cannot combine the <Operation>WithOverflow with this branch // unless the 0th projection (the use of the actual value of the - // <Operation> is either NULL, which means there's no use of the + // <Operation> is either nullptr, which means there's no use of the // actual value, or was already defined, which means it is scheduled // *AFTER* this branch). Node* const node = value->InputAt(0); Node* const result = NodeProperties::FindProjection(node, 0); - if (result == NULL || selector->IsDefined(result)) { + if (result == nullptr || selector->IsDefined(result)) { switch (node->opcode()) { case IrOpcode::kInt32AddWithOverflow: cont->OverwriteAndNegateIfEqual(kOverflow); @@ -1274,8 +1318,14 @@ InstructionSelector::SupportedMachineOperatorFlags() { flags |= MachineOperatorBuilder::kWord32Popcnt; } if (CpuFeatures::IsSupported(SSE4_1)) { - flags |= MachineOperatorBuilder::kFloat64RoundDown | - MachineOperatorBuilder::kFloat64RoundTruncate; + flags |= MachineOperatorBuilder::kFloat32RoundDown | + MachineOperatorBuilder::kFloat64RoundDown | + MachineOperatorBuilder::kFloat32RoundUp | + MachineOperatorBuilder::kFloat64RoundUp | + MachineOperatorBuilder::kFloat32RoundTruncate | + MachineOperatorBuilder::kFloat64RoundTruncate | + MachineOperatorBuilder::kFloat32RoundTiesEven | + MachineOperatorBuilder::kFloat64RoundTiesEven; } return flags; } |