diff options
Diffstat (limited to 'deps/v8/src/arm64/cpu-arm64.cc')
-rw-r--r-- | deps/v8/src/arm64/cpu-arm64.cc | 14 |
1 files changed, 2 insertions, 12 deletions
diff --git a/deps/v8/src/arm64/cpu-arm64.cc b/deps/v8/src/arm64/cpu-arm64.cc index bde3e4aeb9..cf2cc57215 100644 --- a/deps/v8/src/arm64/cpu-arm64.cc +++ b/deps/v8/src/arm64/cpu-arm64.cc @@ -8,7 +8,6 @@ #include "src/arm64/utils-arm64.h" #include "src/assembler.h" -#include "src/objects-inl.h" // TODO(mstarzinger): Temporary cycle breaker! namespace v8 { namespace internal { @@ -40,16 +39,7 @@ class CacheLineSizes { void CpuFeatures::FlushICache(void* address, size_t length) { - if (length == 0) return; - - if (CpuFeatures::IsSupported(COHERENT_CACHE)) return; - -#ifdef USE_SIMULATOR - // TODO(all): consider doing some cache simulation to ensure every address - // run has been synced. - USE(address); - USE(length); -#else +#ifdef V8_HOST_ARCH_ARM64 // The code below assumes user space cache operations are allowed. The goal // of this routine is to make sure the code generated is visible to the I // side of the CPU. @@ -116,7 +106,7 @@ void CpuFeatures::FlushICache(void* address, size_t length) { // move this code before the code is generated. : "cc", "memory" ); // NOLINT -#endif +#endif // V8_HOST_ARCH_ARM64 } } // namespace internal |