diff options
Diffstat (limited to 'deps/v8/src/arm/simulator-arm.cc')
| -rw-r--r-- | deps/v8/src/arm/simulator-arm.cc | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/deps/v8/src/arm/simulator-arm.cc b/deps/v8/src/arm/simulator-arm.cc index ea79310447..036fd7f877 100644 --- a/deps/v8/src/arm/simulator-arm.cc +++ b/deps/v8/src/arm/simulator-arm.cc @@ -26,7 +26,7 @@ // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. #include <stdlib.h> -#include <math.h> +#include <cmath> #include <cstdarg> #include "v8.h" @@ -331,7 +331,7 @@ void ArmDebugger::Debug() { PrintF("\n"); } } - for (int i = 0; i < kNumVFPDoubleRegisters; i++) { + for (int i = 0; i < DwVfpRegister::NumRegisters(); i++) { dvalue = GetVFPDoubleRegisterValue(i); uint64_t as_words = BitCast<uint64_t>(dvalue); PrintF("%3s: %f 0x%08x %08x\n", @@ -1297,7 +1297,7 @@ bool Simulator::OverflowFrom(int32_t alu_out, // Support for VFP comparisons. void Simulator::Compute_FPSCR_Flags(double val1, double val2) { - if (isnan(val1) || isnan(val2)) { + if (std::isnan(val1) || std::isnan(val2)) { n_flag_FPSCR_ = false; z_flag_FPSCR_ = false; c_flag_FPSCR_ = true; @@ -1866,7 +1866,7 @@ void Simulator::SoftwareInterrupt(Instruction* instr) { double Simulator::canonicalizeNaN(double value) { - return (FPSCR_default_NaN_mode_ && isnan(value)) ? + return (FPSCR_default_NaN_mode_ && std::isnan(value)) ? FixedDoubleArray::canonical_not_the_hole_nan_as_double() : value; } @@ -2947,7 +2947,7 @@ void Simulator::DecodeVCMP(Instruction* instr) { // Raise exceptions for quiet NaNs if necessary. if (instr->Bit(7) == 1) { - if (isnan(dd_value)) { + if (std::isnan(dd_value)) { inv_op_vfp_flag_ = true; } } |