diff options
Diffstat (limited to 'deps/v8/src/arm/assembler-arm-inl.h')
| -rw-r--r-- | deps/v8/src/arm/assembler-arm-inl.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/deps/v8/src/arm/assembler-arm-inl.h b/deps/v8/src/arm/assembler-arm-inl.h index 523000ec3a..8f8956c9e1 100644 --- a/deps/v8/src/arm/assembler-arm-inl.h +++ b/deps/v8/src/arm/assembler-arm-inl.h @@ -622,7 +622,7 @@ void Assembler::set_target_address_at(Address pc, Address constant_pool, Memory::Address_at(constant_pool_entry_address(pc, constant_pool)) = target; // Intuitively, we would think it is necessary to always flush the // instruction cache after patching a target address in the code as follows: - // CpuFeatures::FlushICache(pc, sizeof(target)); + // Assembler::FlushICacheWithoutIsolate(pc, sizeof(target)); // However, on ARM, no instruction is actually patched in the case // of embedded constants of the form: // ldr ip, [pp, #...] @@ -640,7 +640,7 @@ void Assembler::set_target_address_at(Address pc, Address constant_pool, DCHECK(IsMovW(Memory::int32_at(pc))); DCHECK(IsMovT(Memory::int32_at(pc + kInstrSize))); if (icache_flush_mode != SKIP_ICACHE_FLUSH) { - CpuFeatures::FlushICache(pc, 2 * kInstrSize); + Assembler::FlushICacheWithoutIsolate(pc, 2 * kInstrSize); } } else { // This is an mov / orr immediate load. Patch the immediate embedded in @@ -660,7 +660,7 @@ void Assembler::set_target_address_at(Address pc, Address constant_pool, IsOrrImmed(Memory::int32_at(pc + 2 * kInstrSize)) && IsOrrImmed(Memory::int32_at(pc + 3 * kInstrSize))); if (icache_flush_mode != SKIP_ICACHE_FLUSH) { - CpuFeatures::FlushICache(pc, 4 * kInstrSize); + Assembler::FlushICacheWithoutIsolate(pc, 4 * kInstrSize); } } } |