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| author | Ujjwal Sharma <usharma1998@gmail.com> | 2019-03-15 18:35:06 +0530 |
|---|---|---|
| committer | Refael Ackermann <refack@gmail.com> | 2019-03-28 16:36:18 -0400 |
| commit | f579e1194046c50f2e6bb54348d48c8e7d1a53cf (patch) | |
| tree | 9125787c758358365f74f9fd9673c14f57e67870 /deps/v8/test/cctest/test-assembler-mips64.cc | |
| parent | 2c73868b0471fbd4038f500d076df056cbf697fe (diff) | |
| download | android-node-v8-f579e1194046c50f2e6bb54348d48c8e7d1a53cf.tar.gz android-node-v8-f579e1194046c50f2e6bb54348d48c8e7d1a53cf.tar.bz2 android-node-v8-f579e1194046c50f2e6bb54348d48c8e7d1a53cf.zip | |
deps: update V8 to 7.4.288.13
PR-URL: https://github.com/nodejs/node/pull/26685
Reviewed-By: Anna Henningsen <anna@addaleax.net>
Reviewed-By: Michaël Zasso <targos@protonmail.com>
Reviewed-By: Refael Ackermann <refack@gmail.com>
Diffstat (limited to 'deps/v8/test/cctest/test-assembler-mips64.cc')
| -rw-r--r-- | deps/v8/test/cctest/test-assembler-mips64.cc | 12 |
1 files changed, 3 insertions, 9 deletions
diff --git a/deps/v8/test/cctest/test-assembler-mips64.cc b/deps/v8/test/cctest/test-assembler-mips64.cc index aa82b359f2..ec5e0e283e 100644 --- a/deps/v8/test/cctest/test-assembler-mips64.cc +++ b/deps/v8/test/cctest/test-assembler-mips64.cc @@ -283,7 +283,6 @@ TEST(MIPS3) { // Create a function that accepts &t, and loads, manipulates, and stores // the doubles t.a ... t.f. MacroAssembler assm(isolate, v8::internal::CodeObjectRequired::kYes); - Label L, C; // Double precision floating point instructions. __ Ldc1(f4, MemOperand(a0, offsetof(T, a))); @@ -406,7 +405,6 @@ TEST(MIPS4) { T t; MacroAssembler assm(isolate, v8::internal::CodeObjectRequired::kYes); - Label L, C; __ Ldc1(f4, MemOperand(a0, offsetof(T, a))); __ Ldc1(f5, MemOperand(a0, offsetof(T, b))); @@ -472,7 +470,6 @@ TEST(MIPS5) { T t; MacroAssembler assm(isolate, v8::internal::CodeObjectRequired::kYes); - Label L, C; // Load all structure elements to registers. __ Ldc1(f4, MemOperand(a0, offsetof(T, a))); @@ -540,7 +537,6 @@ TEST(MIPS6) { T t; MacroAssembler assm(isolate, v8::internal::CodeObjectRequired::kYes); - Label L, C; // Basic word load/store. __ Lw(a4, MemOperand(a0, offsetof(T, ui))); @@ -828,7 +824,6 @@ TEST(MIPS10) { T t; MacroAssembler assm(isolate, v8::internal::CodeObjectRequired::kYes); - Label L, C; if (kArchVariant == kMips64r2) { // Rewritten for FR=1 FPU mode: @@ -1386,7 +1381,6 @@ TEST(MIPS16) { T t; MacroAssembler assm(isolate, v8::internal::CodeObjectRequired::kYes); - Label L, C; // Basic 32-bit word load/store, with un-signed data. __ Lw(a4, MemOperand(a0, offsetof(T, ui))); @@ -5358,7 +5352,7 @@ uint64_t run_jic(int16_t offset) { MacroAssembler assm(isolate, v8::internal::CodeObjectRequired::kYes); - Label get_program_counter, stop_execution; + Label stop_execution; __ push(ra); __ li(v0, 0l); __ li(t1, 0x66); @@ -5690,7 +5684,7 @@ uint64_t run_jialc(int16_t offset) { MacroAssembler assm(isolate, v8::internal::CodeObjectRequired::kYes); - Label main_block, get_program_counter; + Label main_block; __ push(ra); __ li(v0, 0l); __ beq(v0, v0, &main_block); @@ -5991,7 +5985,7 @@ int64_t run_balc(int32_t offset) { MacroAssembler assm(isolate, v8::internal::CodeObjectRequired::kYes); - Label continue_1, stop_execution; + Label continue_1; __ push(ra); __ li(v0, 0l); __ li(t8, 0l); |