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author | Michaël Zasso <targos@protonmail.com> | 2019-11-08 15:39:11 +0100 |
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committer | Michaël Zasso <targos@protonmail.com> | 2019-11-08 15:46:25 +0100 |
commit | 6ca81ad72a3c6fdf16c683335be748f22aaa9a0d (patch) | |
tree | 33c8ee75f729aed76c2c0b89c63f9bf1b4dd66aa /deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h | |
parent | 1eee0b8bf8bba39b600fb16a9223e545e3bac2bc (diff) | |
download | android-node-v8-6ca81ad72a3c6fdf16c683335be748f22aaa9a0d.tar.gz android-node-v8-6ca81ad72a3c6fdf16c683335be748f22aaa9a0d.tar.bz2 android-node-v8-6ca81ad72a3c6fdf16c683335be748f22aaa9a0d.zip |
deps: update V8 to 7.9.317.20
PR-URL: https://github.com/nodejs/node/pull/30020
Reviewed-By: Colin Ihrig <cjihrig@gmail.com>
Reviewed-By: Jiawen Geng <technicalcute@gmail.com>
Reviewed-By: Anna Henningsen <anna@addaleax.net>
Reviewed-By: Matteo Collina <matteo.collina@gmail.com>
Diffstat (limited to 'deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h')
-rw-r--r-- | deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h | 81 |
1 files changed, 81 insertions, 0 deletions
diff --git a/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h b/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h index d17c7dada1..36267560dd 100644 --- a/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h +++ b/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390.h @@ -12,6 +12,48 @@ namespace v8 { namespace internal { namespace wasm { +namespace liftoff { + +// half +// slot Frame +// -----+--------------------+--------------------------- +// n+3 | parameter n | +// ... | ... | +// 4 | parameter 1 | or parameter 2 +// 3 | parameter 0 | or parameter 1 +// 2 | (result address) | or parameter 0 +// -----+--------------------+--------------------------- +// 1 | return addr (lr) | +// 0 | previous frame (fp)| +// -----+--------------------+ <-- frame ptr (fp) +// -1 | 0xa: WASM_COMPILED | +// -2 | instance | +// -----+--------------------+--------------------------- +// -3 | slot 0 (high) | ^ +// -4 | slot 0 (low) | | +// -5 | slot 1 (high) | Frame slots +// -6 | slot 1 (low) | | +// | | v +// -----+--------------------+ <-- stack ptr (sp) +// +constexpr int32_t kInstanceOffset = 2 * kSystemPointerSize; +constexpr int32_t kFirstStackSlotOffset = + kInstanceOffset + 2 * kSystemPointerSize; + +inline int GetStackSlotOffset(uint32_t index) { + return kFirstStackSlotOffset + index * LiftoffAssembler::kStackSlotSize; +} + +inline MemOperand GetHalfStackSlot(uint32_t index, RegPairHalf half) { + int32_t half_offset = + half == kLowWord ? 0 : LiftoffAssembler::kStackSlotSize / 2; + int32_t offset = kFirstStackSlotOffset + + index * LiftoffAssembler::kStackSlotSize - half_offset; + return MemOperand(fp, -offset); +} + +} // namespace liftoff + int LiftoffAssembler::PrepareStackFrame() { bailout(kUnsupportedArchitecture, "PrepareStackFrame"); return 0; @@ -108,6 +150,45 @@ void LiftoffAssembler::FillI64Half(Register, uint32_t index, RegPairHalf) { bailout(kUnsupportedArchitecture, "FillI64Half"); } +void LiftoffAssembler::FillStackSlotsWithZero(uint32_t index, uint32_t count) { + DCHECK_LT(0, count); + uint32_t last_stack_slot = index + count - 1; + RecordUsedSpillSlot(last_stack_slot); + + // We need a zero reg. Always use r0 for that, and push it before to restore + // its value afterwards. + push(r0); + mov(r0, Operand(0)); + + if (count <= 5) { + // Special straight-line code for up to five slots. Generates two + // instructions per slot. + for (uint32_t offset = 0; offset < count; ++offset) { + StoreP(r0, liftoff::GetHalfStackSlot(index + offset, kLowWord)); + StoreP(r0, liftoff::GetHalfStackSlot(index + offset, kHighWord)); + } + } else { + // General case for bigger counts (9 instructions). + // Use r3 for start address (inclusive), r4 for end address (exclusive). + push(r3); + push(r4); + SubP(r3, fp, Operand(liftoff::GetStackSlotOffset(last_stack_slot))); + SubP(r4, fp, Operand(liftoff::GetStackSlotOffset(index) + kStackSlotSize)); + + Label loop; + bind(&loop); + StoreP(r0, MemOperand(r0)); + la(r0, MemOperand(r0, kSystemPointerSize)); + CmpLogicalP(r3, r4); + bne(&loop); + + pop(r4); + pop(r3); + } + + pop(r0); +} + #define UNIMPLEMENTED_I32_BINOP(name) \ void LiftoffAssembler::emit_##name(Register dst, Register lhs, \ Register rhs) { \ |