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author | Michaël Zasso <targos@protonmail.com> | 2018-09-21 09:14:51 +0200 |
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committer | Michaël Zasso <targos@protonmail.com> | 2018-09-22 18:29:25 +0200 |
commit | 0e7ddbd3d7e9439c67573b854c49cf82c398ae82 (patch) | |
tree | 2afe372acde921cb57ddb3444ff00c5adef8848c /deps/v8/src/wasm/baseline/mips/liftoff-assembler-mips.h | |
parent | 13245dc50da4cb7443c39ef6c68d419d5e6336d4 (diff) | |
download | android-node-v8-0e7ddbd3d7e9439c67573b854c49cf82c398ae82.tar.gz android-node-v8-0e7ddbd3d7e9439c67573b854c49cf82c398ae82.tar.bz2 android-node-v8-0e7ddbd3d7e9439c67573b854c49cf82c398ae82.zip |
deps: update V8 to 7.0.276.20
PR-URL: https://github.com/nodejs/node/pull/22754
Reviewed-By: Matteo Collina <matteo.collina@gmail.com>
Reviewed-By: James M Snell <jasnell@gmail.com>
Reviewed-By: Refael Ackermann <refack@gmail.com>
Reviewed-By: Ali Ijaz Sheikh <ofrobots@google.com>
Reviewed-By: Colin Ihrig <cjihrig@gmail.com>
Diffstat (limited to 'deps/v8/src/wasm/baseline/mips/liftoff-assembler-mips.h')
-rw-r--r-- | deps/v8/src/wasm/baseline/mips/liftoff-assembler-mips.h | 263 |
1 files changed, 132 insertions, 131 deletions
diff --git a/deps/v8/src/wasm/baseline/mips/liftoff-assembler-mips.h b/deps/v8/src/wasm/baseline/mips/liftoff-assembler-mips.h index d2ea65211b..bb18994618 100644 --- a/deps/v8/src/wasm/baseline/mips/liftoff-assembler-mips.h +++ b/deps/v8/src/wasm/baseline/mips/liftoff-assembler-mips.h @@ -98,6 +98,135 @@ inline void push(LiftoffAssembler* assm, LiftoffRegister reg, ValueType type) { } } +#if defined(V8_TARGET_BIG_ENDIAN) +inline void ChangeEndiannessLoad(LiftoffAssembler* assm, LiftoffRegister dst, + LoadType type, LiftoffRegList pinned) { + bool is_float = false; + LiftoffRegister tmp = dst; + switch (type.value()) { + case LoadType::kI64Load8U: + case LoadType::kI64Load8S: + // Swap low and high registers. + assm->TurboAssembler::Move(kScratchReg, tmp.low_gp()); + assm->TurboAssembler::Move(tmp.low_gp(), tmp.high_gp()); + assm->TurboAssembler::Move(tmp.high_gp(), kScratchReg); + V8_FALLTHROUGH; + case LoadType::kI32Load8U: + case LoadType::kI32Load8S: + // No need to change endianness for byte size. + return; + case LoadType::kF32Load: + is_float = true; + tmp = assm->GetUnusedRegister(kGpReg, pinned); + assm->emit_type_conversion(kExprI32ReinterpretF32, tmp, dst); + V8_FALLTHROUGH; + case LoadType::kI32Load: + assm->TurboAssembler::ByteSwapSigned(tmp.gp(), tmp.gp(), 4); + break; + case LoadType::kI32Load16S: + assm->TurboAssembler::ByteSwapSigned(tmp.gp(), tmp.gp(), 2); + break; + case LoadType::kI32Load16U: + assm->TurboAssembler::ByteSwapUnsigned(tmp.gp(), tmp.gp(), 2); + break; + case LoadType::kF64Load: + is_float = true; + tmp = assm->GetUnusedRegister(kGpRegPair, pinned); + assm->emit_type_conversion(kExprI64ReinterpretF64, tmp, dst); + V8_FALLTHROUGH; + case LoadType::kI64Load: + assm->TurboAssembler::Move(kScratchReg, tmp.low_gp()); + assm->TurboAssembler::ByteSwapSigned(tmp.low_gp(), tmp.high_gp(), 4); + assm->TurboAssembler::ByteSwapSigned(tmp.high_gp(), kScratchReg, 4); + break; + case LoadType::kI64Load16U: + assm->TurboAssembler::ByteSwapUnsigned(tmp.low_gp(), tmp.high_gp(), 2); + assm->TurboAssembler::Move(tmp.high_gp(), zero_reg); + break; + case LoadType::kI64Load16S: + assm->TurboAssembler::ByteSwapSigned(tmp.low_gp(), tmp.high_gp(), 2); + assm->sra(tmp.high_gp(), tmp.high_gp(), 31); + break; + case LoadType::kI64Load32U: + assm->TurboAssembler::ByteSwapSigned(tmp.low_gp(), tmp.high_gp(), 4); + assm->TurboAssembler::Move(tmp.high_gp(), zero_reg); + break; + case LoadType::kI64Load32S: + assm->TurboAssembler::ByteSwapSigned(tmp.low_gp(), tmp.high_gp(), 4); + assm->sra(tmp.high_gp(), tmp.high_gp(), 31); + break; + default: + UNREACHABLE(); + } + + if (is_float) { + switch (type.value()) { + case LoadType::kF32Load: + assm->emit_type_conversion(kExprF32ReinterpretI32, dst, tmp); + break; + case LoadType::kF64Load: + assm->emit_type_conversion(kExprF64ReinterpretI64, dst, tmp); + break; + default: + UNREACHABLE(); + } + } +} + +inline void ChangeEndiannessStore(LiftoffAssembler* assm, LiftoffRegister src, + StoreType type, LiftoffRegList pinned) { + bool is_float = false; + LiftoffRegister tmp = src; + switch (type.value()) { + case StoreType::kI64Store8: + // Swap low and high registers. + assm->TurboAssembler::Move(kScratchReg, tmp.low_gp()); + assm->TurboAssembler::Move(tmp.low_gp(), tmp.high_gp()); + assm->TurboAssembler::Move(tmp.high_gp(), kScratchReg); + V8_FALLTHROUGH; + case StoreType::kI32Store8: + // No need to change endianness for byte size. + return; + case StoreType::kF32Store: + is_float = true; + tmp = assm->GetUnusedRegister(kGpReg, pinned); + assm->emit_type_conversion(kExprI32ReinterpretF32, tmp, src); + V8_FALLTHROUGH; + case StoreType::kI32Store: + case StoreType::kI32Store16: + assm->TurboAssembler::ByteSwapSigned(tmp.gp(), tmp.gp(), 4); + break; + case StoreType::kF64Store: + is_float = true; + tmp = assm->GetUnusedRegister(kGpRegPair, pinned); + assm->emit_type_conversion(kExprI64ReinterpretF64, tmp, src); + V8_FALLTHROUGH; + case StoreType::kI64Store: + case StoreType::kI64Store32: + case StoreType::kI64Store16: + assm->TurboAssembler::Move(kScratchReg, tmp.low_gp()); + assm->TurboAssembler::ByteSwapSigned(tmp.low_gp(), tmp.high_gp(), 4); + assm->TurboAssembler::ByteSwapSigned(tmp.high_gp(), kScratchReg, 4); + break; + default: + UNREACHABLE(); + } + + if (is_float) { + switch (type.value()) { + case StoreType::kF32Store: + assm->emit_type_conversion(kExprF32ReinterpretI32, src, tmp); + break; + case StoreType::kF64Store: + assm->emit_type_conversion(kExprF64ReinterpretI64, src, tmp); + break; + default: + UNREACHABLE(); + } + } +} +#endif // V8_TARGET_BIG_ENDIAN + } // namespace liftoff int LiftoffAssembler::PrepareStackFrame() { @@ -248,7 +377,7 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr, #if defined(V8_TARGET_BIG_ENDIAN) if (is_load_mem) { - ChangeEndiannessLoad(dst, type, pinned); + liftoff::ChangeEndiannessLoad(this, dst, type, pinned); } #endif } @@ -273,7 +402,7 @@ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg, src = tmp; pinned.set(tmp); - ChangeEndiannessStore(src, type, pinned); + liftoff::ChangeEndiannessStore(this, src, type, pinned); } #endif @@ -316,134 +445,6 @@ void LiftoffAssembler::Store(Register dst_addr, Register offset_reg, } } -void LiftoffAssembler::ChangeEndiannessLoad(LiftoffRegister dst, LoadType type, - LiftoffRegList pinned) { - bool is_float = false; - LiftoffRegister tmp = dst; - switch (type.value()) { - case LoadType::kI64Load8U: - case LoadType::kI64Load8S: - // Swap low and high registers. - TurboAssembler::Move(kScratchReg, tmp.low_gp()); - TurboAssembler::Move(tmp.low_gp(), tmp.high_gp()); - TurboAssembler::Move(tmp.high_gp(), kScratchReg); - V8_FALLTHROUGH; - case LoadType::kI32Load8U: - case LoadType::kI32Load8S: - // No need to change endianness for byte size. - return; - case LoadType::kF32Load: - is_float = true; - tmp = GetUnusedRegister(kGpReg, pinned); - emit_type_conversion(kExprI32ReinterpretF32, tmp, dst); - V8_FALLTHROUGH; - case LoadType::kI32Load: - TurboAssembler::ByteSwapSigned(tmp.gp(), tmp.gp(), 4); - break; - case LoadType::kI32Load16S: - TurboAssembler::ByteSwapSigned(tmp.gp(), tmp.gp(), 2); - break; - case LoadType::kI32Load16U: - TurboAssembler::ByteSwapUnsigned(tmp.gp(), tmp.gp(), 2); - break; - case LoadType::kF64Load: - is_float = true; - tmp = GetUnusedRegister(kGpRegPair, pinned); - emit_type_conversion(kExprI64ReinterpretF64, tmp, dst); - V8_FALLTHROUGH; - case LoadType::kI64Load: - TurboAssembler::Move(kScratchReg, tmp.low_gp()); - TurboAssembler::ByteSwapSigned(tmp.low_gp(), tmp.high_gp(), 4); - TurboAssembler::ByteSwapSigned(tmp.high_gp(), kScratchReg, 4); - break; - case LoadType::kI64Load16U: - TurboAssembler::ByteSwapUnsigned(tmp.low_gp(), tmp.high_gp(), 2); - TurboAssembler::Move(tmp.high_gp(), zero_reg); - break; - case LoadType::kI64Load16S: - TurboAssembler::ByteSwapSigned(tmp.low_gp(), tmp.high_gp(), 2); - sra(tmp.high_gp(), tmp.high_gp(), 31); - break; - case LoadType::kI64Load32U: - TurboAssembler::ByteSwapSigned(tmp.low_gp(), tmp.high_gp(), 4); - TurboAssembler::Move(tmp.high_gp(), zero_reg); - break; - case LoadType::kI64Load32S: - TurboAssembler::ByteSwapSigned(tmp.low_gp(), tmp.high_gp(), 4); - sra(tmp.high_gp(), tmp.high_gp(), 31); - break; - default: - UNREACHABLE(); - } - - if (is_float) { - switch (type.value()) { - case LoadType::kF32Load: - emit_type_conversion(kExprF32ReinterpretI32, dst, tmp); - break; - case LoadType::kF64Load: - emit_type_conversion(kExprF64ReinterpretI64, dst, tmp); - break; - default: - UNREACHABLE(); - } - } -} - -void LiftoffAssembler::ChangeEndiannessStore(LiftoffRegister src, - StoreType type, - LiftoffRegList pinned) { - bool is_float = false; - LiftoffRegister tmp = src; - switch (type.value()) { - case StoreType::kI64Store8: - // Swap low and high registers. - TurboAssembler::Move(kScratchReg, tmp.low_gp()); - TurboAssembler::Move(tmp.low_gp(), tmp.high_gp()); - TurboAssembler::Move(tmp.high_gp(), kScratchReg); - V8_FALLTHROUGH; - case StoreType::kI32Store8: - // No need to change endianness for byte size. - return; - case StoreType::kF32Store: - is_float = true; - tmp = GetUnusedRegister(kGpReg, pinned); - emit_type_conversion(kExprI32ReinterpretF32, tmp, src); - V8_FALLTHROUGH; - case StoreType::kI32Store: - case StoreType::kI32Store16: - TurboAssembler::ByteSwapSigned(tmp.gp(), tmp.gp(), 4); - break; - case StoreType::kF64Store: - is_float = true; - tmp = GetUnusedRegister(kGpRegPair, pinned); - emit_type_conversion(kExprI64ReinterpretF64, tmp, src); - V8_FALLTHROUGH; - case StoreType::kI64Store: - case StoreType::kI64Store32: - case StoreType::kI64Store16: - TurboAssembler::Move(kScratchReg, tmp.low_gp()); - TurboAssembler::ByteSwapSigned(tmp.low_gp(), tmp.high_gp(), 4); - TurboAssembler::ByteSwapSigned(tmp.high_gp(), kScratchReg, 4); - break; - default: - UNREACHABLE(); - } - - if (is_float) { - switch (type.value()) { - case StoreType::kF32Store: - emit_type_conversion(kExprF32ReinterpretI32, src, tmp); - break; - case StoreType::kF64Store: - emit_type_conversion(kExprF64ReinterpretI64, src, tmp); - break; - default: - UNREACHABLE(); - } - } -} - void LiftoffAssembler::LoadCallerFrameSlot(LiftoffRegister dst, uint32_t caller_slot_idx, ValueType type) { @@ -745,7 +746,7 @@ void LiftoffAssembler::emit_i64_shr(LiftoffRegister dst, LiftoffRegister src, } void LiftoffAssembler::emit_i32_to_intptr(Register dst, Register src) { - UNREACHABLE(); + // This is a nop on mips32. } void LiftoffAssembler::emit_f32_neg(DoubleRegister dst, DoubleRegister src) { |