deps: update V8 to 6.2.414.32

PR-URL: https://github.com/nodejs/node/pull/15362
Reviewed-By: Myles Borins <myles.borins@gmail.com>
Reviewed-By: Colin Ihrig <cjihrig@gmail.com>
Reviewed-By: Matteo Collina <matteo.collina@gmail.com>
Reviewed-By: Ben Noordhuis <info@bnoordhuis.nl>

1 files changed, 11 insertions, 3 deletions

diff --git a/deps/v8/src/register-configuration.h b/deps/v8/src/register-configuration.h
index 58b62db898..59aeab8742 100644
--- a/deps/v8/src/register-configuration.h
+++ b/deps/v8/src/register-configuration.h
@@ -8,6 +8,7 @@
 #include "src/base/macros.h"
 #include "src/globals.h"
 #include "src/machine-type.h"
+#include "src/reglist.h"
 
 namespace v8 {
 namespace internal {
@@ -28,9 +29,10 @@ class V8_EXPORT_PRIVATE RegisterConfiguration {
   static const int kMaxFPRegisters = 32;
 
   // Default RegisterConfigurations for the target architecture.
-  // TODO(mstarzinger): Crankshaft is gone.
-  static const RegisterConfiguration* Crankshaft();
-  static const RegisterConfiguration* Turbofan();
+  static const RegisterConfiguration* Default();
+
+  static const RegisterConfiguration* RestrictGeneralRegisters(
+      RegList registers);
 
   RegisterConfiguration(int num_general_registers, int num_double_registers,
                         int num_allocatable_general_registers,
@@ -70,24 +72,28 @@ class V8_EXPORT_PRIVATE RegisterConfiguration {
     return allocatable_float_codes_mask_;
   }
   int GetAllocatableGeneralCode(int index) const {
+    DCHECK(index >= 0 && index < num_allocatable_general_registers());
     return allocatable_general_codes_[index];
   }
   bool IsAllocatableGeneralCode(int index) const {
     return ((1 << index) & allocatable_general_codes_mask_) != 0;
   }
   int GetAllocatableFloatCode(int index) const {
+    DCHECK(index >= 0 && index < num_allocatable_float_registers());
     return allocatable_float_codes_[index];
   }
   bool IsAllocatableFloatCode(int index) const {
     return ((1 << index) & allocatable_float_codes_mask_) != 0;
   }
   int GetAllocatableDoubleCode(int index) const {
+    DCHECK(index >= 0 && index < num_allocatable_double_registers());
     return allocatable_double_codes_[index];
   }
   bool IsAllocatableDoubleCode(int index) const {
     return ((1 << index) & allocatable_double_codes_mask_) != 0;
   }
   int GetAllocatableSimd128Code(int index) const {
+    DCHECK(index >= 0 && index < num_allocatable_simd128_registers());
     return allocatable_simd128_codes_[index];
   }
   bool IsAllocatableSimd128Code(int index) const {
@@ -130,6 +136,8 @@ class V8_EXPORT_PRIVATE RegisterConfiguration {
   bool AreAliases(MachineRepresentation rep, int index,
                   MachineRepresentation other_rep, int other_index) const;
 
+  virtual ~RegisterConfiguration() {}
+
  private:
   const int num_general_registers_;
   int num_float_registers_;