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| author | Michaël Zasso <targos@protonmail.com> | 2018-09-21 09:14:51 +0200 |
|---|---|---|
| committer | Michaël Zasso <targos@protonmail.com> | 2018-09-22 18:29:25 +0200 |
| commit | 0e7ddbd3d7e9439c67573b854c49cf82c398ae82 (patch) | |
| tree | 2afe372acde921cb57ddb3444ff00c5adef8848c /deps/v8/src/arm/simulator-arm.h | |
| parent | 13245dc50da4cb7443c39ef6c68d419d5e6336d4 (diff) | |
| download | android-node-v8-0e7ddbd3d7e9439c67573b854c49cf82c398ae82.tar.gz android-node-v8-0e7ddbd3d7e9439c67573b854c49cf82c398ae82.tar.bz2 android-node-v8-0e7ddbd3d7e9439c67573b854c49cf82c398ae82.zip | |
deps: update V8 to 7.0.276.20
PR-URL: https://github.com/nodejs/node/pull/22754
Reviewed-By: Matteo Collina <matteo.collina@gmail.com>
Reviewed-By: James M Snell <jasnell@gmail.com>
Reviewed-By: Refael Ackermann <refack@gmail.com>
Reviewed-By: Ali Ijaz Sheikh <ofrobots@google.com>
Reviewed-By: Colin Ihrig <cjihrig@gmail.com>
Diffstat (limited to 'deps/v8/src/arm/simulator-arm.h')
| -rw-r--r-- | deps/v8/src/arm/simulator-arm.h | 23 |
1 files changed, 13 insertions, 10 deletions
diff --git a/deps/v8/src/arm/simulator-arm.h b/deps/v8/src/arm/simulator-arm.h index 6eb3cf6c6b..69e5cdbe3d 100644 --- a/deps/v8/src/arm/simulator-arm.h +++ b/deps/v8/src/arm/simulator-arm.h @@ -276,21 +276,23 @@ class Simulator : public SimulatorBase { inline void WriteB(int32_t addr, int8_t value); int WriteExB(int32_t addr, uint8_t value); - inline uint16_t ReadHU(int32_t addr, Instruction* instr); - inline int16_t ReadH(int32_t addr, Instruction* instr); - uint16_t ReadExHU(int32_t addr, Instruction* instr); + inline uint16_t ReadHU(int32_t addr); + inline int16_t ReadH(int32_t addr); + uint16_t ReadExHU(int32_t addr); // Note: Overloaded on the sign of the value. - inline void WriteH(int32_t addr, uint16_t value, Instruction* instr); - inline void WriteH(int32_t addr, int16_t value, Instruction* instr); - int WriteExH(int32_t addr, uint16_t value, Instruction* instr); + inline void WriteH(int32_t addr, uint16_t value); + inline void WriteH(int32_t addr, int16_t value); + int WriteExH(int32_t addr, uint16_t value); - inline int ReadW(int32_t addr, Instruction* instr); - int ReadExW(int32_t addr, Instruction* instr); - inline void WriteW(int32_t addr, int value, Instruction* instr); - int WriteExW(int32_t addr, int value, Instruction* instr); + inline int ReadW(int32_t addr); + int ReadExW(int32_t addr); + inline void WriteW(int32_t addr, int value); + int WriteExW(int32_t addr, int value); int32_t* ReadDW(int32_t addr); void WriteDW(int32_t addr, int32_t value1, int32_t value2); + int32_t* ReadExDW(int32_t addr); + int WriteExDW(int32_t addr, int32_t value1, int32_t value2); // Executing is handled based on the instruction type. // Both type 0 and type 1 rolled into one. @@ -414,6 +416,7 @@ class Simulator : public SimulatorBase { Byte = 1, HalfWord = 2, Word = 4, + DoubleWord = 8, }; // The least-significant bits of the address are ignored. The number of bits |