1 files changed, 43 insertions, 13 deletions

diff --git a/deps/v8/src/codegen/arm64/macro-assembler-arm64-inl.h b/deps/v8/src/codegen/arm64/macro-assembler-arm64-inl.h
index 62bd9c26bf..261fd1e564 100644
--- a/deps/v8/src/codegen/arm64/macro-assembler-arm64-inl.h
+++ b/deps/v8/src/codegen/arm64/macro-assembler-arm64-inl.h
@@ -93,6 +93,15 @@ void TurboAssembler::Ccmp(const Register& rn, const Operand& operand,
   }
 }
 
+void TurboAssembler::CcmpTagged(const Register& rn, const Operand& operand,
+                                StatusFlags nzcv, Condition cond) {
+  if (COMPRESS_POINTERS_BOOL) {
+    Ccmp(rn.W(), operand.ToW(), nzcv, cond);
+  } else {
+    Ccmp(rn, operand, nzcv, cond);
+  }
+}
+
 void MacroAssembler::Ccmn(const Register& rn, const Operand& operand,
                           StatusFlags nzcv, Condition cond) {
   DCHECK(allow_macro_instructions());
@@ -157,6 +166,14 @@ void TurboAssembler::Cmp(const Register& rn, const Operand& operand) {
   Subs(AppropriateZeroRegFor(rn), rn, operand);
 }
 
+void TurboAssembler::CmpTagged(const Register& rn, const Operand& operand) {
+  if (COMPRESS_POINTERS_BOOL) {
+    Cmp(rn.W(), operand.ToW());
+  } else {
+    Cmp(rn, operand);
+  }
+}
+
 void TurboAssembler::Neg(const Register& rd, const Operand& operand) {
   DCHECK(allow_macro_instructions());
   DCHECK(!rd.IsZero());
@@ -982,7 +999,12 @@ void TurboAssembler::SmiUntag(Register dst, Register src) {
     AssertSmi(src);
   }
   DCHECK(SmiValuesAre32Bits() || SmiValuesAre31Bits());
-  Asr(dst, src, kSmiShift);
+  if (COMPRESS_POINTERS_BOOL) {
+    Asr(dst.W(), src.W(), kSmiShift);
+    Sxtw(dst, dst);
+  } else {
+    Asr(dst, src, kSmiShift);
+  }
 }
 
 void TurboAssembler::SmiUntag(Register dst, const MemOperand& src) {
@@ -1002,11 +1024,11 @@ void TurboAssembler::SmiUntag(Register dst, const MemOperand& src) {
     }
   } else {
     DCHECK(SmiValuesAre31Bits());
-#ifdef V8_COMPRESS_POINTERS
-    Ldrsw(dst, src);
-#else
-    Ldr(dst, src);
-#endif
+    if (COMPRESS_POINTERS_BOOL) {
+      Ldr(dst.W(), src);
+    } else {
+      Ldr(dst, src);
+    }
     SmiUntag(dst);
   }
 }
@@ -1029,13 +1051,11 @@ void TurboAssembler::JumpIfSmi(Register value, Label* smi_label,
 }
 
 void TurboAssembler::JumpIfEqual(Register x, int32_t y, Label* dest) {
-  Cmp(x, y);
-  B(eq, dest);
+  CompareAndBranch(x, y, eq, dest);
 }
 
 void TurboAssembler::JumpIfLessThan(Register x, int32_t y, Label* dest) {
-  Cmp(x, y);
-  B(lt, dest);
+  CompareAndBranch(x, y, lt, dest);
 }
 
 void MacroAssembler::JumpIfNotSmi(Register value, Label* not_smi_label) {
@@ -1083,7 +1103,7 @@ void TurboAssembler::Claim(const Register& count, uint64_t unit_size) {
   if (unit_size == 0) return;
   DCHECK(base::bits::IsPowerOfTwo(unit_size));
 
-  const int shift = CountTrailingZeros(unit_size, kXRegSizeInBits);
+  const int shift = base::bits::CountTrailingZeros(unit_size);
   const Operand size(count, LSL, shift);
 
   if (size.IsZero()) {
@@ -1136,7 +1156,7 @@ void TurboAssembler::Drop(const Register& count, uint64_t unit_size) {
   if (unit_size == 0) return;
   DCHECK(base::bits::IsPowerOfTwo(unit_size));
 
-  const int shift = CountTrailingZeros(unit_size, kXRegSizeInBits);
+  const int shift = base::bits::CountTrailingZeros(unit_size);
   const Operand size(count, LSL, shift);
 
   if (size.IsZero()) {
@@ -1175,7 +1195,7 @@ void TurboAssembler::DropSlots(int64_t count) {
 
 void TurboAssembler::PushArgument(const Register& arg) { Push(padreg, arg); }
 
-void MacroAssembler::CompareAndBranch(const Register& lhs, const Operand& rhs,
+void TurboAssembler::CompareAndBranch(const Register& lhs, const Operand& rhs,
                                       Condition cond, Label* label) {
   if (rhs.IsImmediate() && (rhs.ImmediateValue() == 0) &&
       ((cond == eq) || (cond == ne))) {
@@ -1190,6 +1210,16 @@ void MacroAssembler::CompareAndBranch(const Register& lhs, const Operand& rhs,
   }
 }
 
+void TurboAssembler::CompareTaggedAndBranch(const Register& lhs,
+                                            const Operand& rhs, Condition cond,
+                                            Label* label) {
+  if (COMPRESS_POINTERS_BOOL) {
+    CompareAndBranch(lhs.W(), rhs.ToW(), cond, label);
+  } else {
+    CompareAndBranch(lhs, rhs, cond, label);
+  }
+}
+
 void TurboAssembler::TestAndBranchIfAnySet(const Register& reg,
                                            const uint64_t bit_pattern,
                                            Label* label) {