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Diffstat (limited to 'deps/openssl/openssl/crypto/aes/asm/aest4-sparcv9.pl')
-rw-r--r--deps/openssl/openssl/crypto/aes/asm/aest4-sparcv9.pl8
1 files changed, 4 insertions, 4 deletions
diff --git a/deps/openssl/openssl/crypto/aes/asm/aest4-sparcv9.pl b/deps/openssl/openssl/crypto/aes/asm/aest4-sparcv9.pl
index bf479c60ae..54d0c58821 100644
--- a/deps/openssl/openssl/crypto/aes/asm/aest4-sparcv9.pl
+++ b/deps/openssl/openssl/crypto/aes/asm/aest4-sparcv9.pl
@@ -8,9 +8,9 @@
# ====================================================================
-# Written by David S. Miller <davem@devemloft.net> and Andy Polyakov
-# <appro@openssl.org>. The module is licensed under 2-clause BSD
-# license. October 2012. All rights reserved.
+# Written by David S. Miller and Andy Polyakov.
+# The module is licensed under 2-clause BSD license. October 2012.
+# All rights reserved.
# ====================================================================
######################################################################
@@ -44,7 +44,7 @@
# instructions with those on critical path. Amazing!
#
# As with Intel AES-NI, question is if it's possible to improve
-# performance of parallelizeable modes by interleaving round
+# performance of parallelizable modes by interleaving round
# instructions. Provided round instruction latency and throughput
# optimal interleave factor is 2. But can we expect 2x performance
# improvement? Well, as round instructions can be issued one per