literature.bib (11363B)
1 @article{cap, 2 author = {Gilbert, Seth and Lynch, Nancy}, 3 title = {Brewer's Conjecture and the Feasibility of Consistent, Available, Partition-Tolerant Web Services}, 4 year = {2002}, 5 issue_date = {June 2002}, 6 publisher = {Association for Computing Machinery}, 7 address = {New York, NY, USA}, 8 volume = {33}, 9 number = {2}, 10 issn = {0163-5700}, 11 url = {https://doi.org/10.1145/564585.564601}, 12 doi = {10.1145/564585.564601}, 13 abstract = {When designing distributed web services, there are three properties that are commonly desired: consistency, availability, and partition tolerance. It is impossible to achieve all three. In this note, we prove this conjecture in the asynchronous network model, and then discuss solutions to this dilemma in the partially synchronous model.}, 14 journal = {SIGACT News}, 15 month = jun, 16 pages = {51–59}, 17 numpages = {9} 18 } 19 20 @misc{christodorescu2020twotier, 21 title={Towards a Two-Tier Hierarchical Infrastructure: An Offline Payment System for Central Bank Digital Currencies}, 22 author={Mihai Christodorescu and Wanyun Catherine Gu and Ranjit Kumaresan and Mohsen Minaei and Mustafa Ozdayi and Benjamin Price and Srinivasan Raghuraman and Muhammad Saad and Cuy Sheffield and Minghua Xu and Mahdi Zamani}, 23 year={2020}, 24 eprint={2012.08003}, 25 archivePrefix={arXiv}, 26 primaryClass={cs.CR} 27 } 28 29 @InProceedings{chaum1988offine, 30 author="Chaum, David 31 and Fiat, Amos 32 and Naor, Moni", 33 editor="Goldwasser, Shafi", 34 title="Untraceable Electronic Cash", 35 booktitle="Advances in Cryptology --- CRYPTO' 88", 36 year="1990", 37 publisher="Springer New York", 38 address="New York, NY", 39 pages="319--327", 40 abstract="The use of credit cards today is an act of faith on the p a t of all concerned. Each party is vulnerable to fraud by the others, and the cardholder in particular has no protection against surveillance.", 41 isbn="978-0-387-34799-8" 42 } 43 44 45 46 @Article{calhoun2019puf, 47 AUTHOR = {Calhoun, Jeff and Minwalla, Cyrus and Helmich, Charles and Saqib, Fareena and Che, Wenjie and Plusquellic, Jim}, 48 TITLE = {Physical Unclonable Function (PUF)-Based e-Cash Transaction Protocol (PUF-Cash)}, 49 JOURNAL = {Cryptography}, 50 VOLUME = {3}, 51 YEAR = {2019}, 52 NUMBER = {3}, 53 ARTICLE-NUMBER = {18}, 54 URL = {https://www.mdpi.com/2410-387X/3/3/18}, 55 ISSN = {2410-387X}, 56 DOI = {10.3390/cryptography3030018} 57 } 58 59 @misc{ecb2020digitaleuro, 60 title = {Report on a digital euro}, 61 year = {2020}, 62 month = {October}, 63 howpublished = {\url{https://www.ecb.europa.eu/pub/pdf/other/Report_on_a_digital_euro~4d7268b458.en.pdf}}, 64 } 65 66 @misc{chaum2021issue, 67 title={How to Issue a Central Bank Digital Currency}, 68 author={David Chaum and Christian Grothoff and Thomas Moser}, 69 year={2021}, 70 eprint={2103.00254}, 71 archivePrefix={arXiv}, 72 primaryClass={econ.GN} 73 } 74 75 @inproceedings{chaum1988untraceable, 76 title={Untraceable electronic cash}, 77 author={Chaum, David and Fiat, Amos and Naor, Moni}, 78 booktitle={Conference on the Theory and Application of Cryptography}, 79 pages={319--327}, 80 year={1988}, 81 organization={Springer} 82 } 83 84 @INPROCEEDINGS{samsung2017knox, 85 author={M. {Dorjmyagmar} and M. {Kim} and H. {Kim}}, 86 booktitle={2017 19th International Conference on Advanced Communication Technology (ICACT)}, 87 title={Security analysis of Samsung Knox}, 88 year={2017}, 89 volume={}, 90 number={}, 91 pages={550-553}, 92 doi={10.23919/ICACT.2017.7890150}} 93 94 @INPROCEEDINGS{arm2016alias, 95 author={R. {Guanciale} and H. {Nemati} and C. {Baumann} and M. {Dam}}, 96 booktitle={2016 IEEE Symposium on Security and Privacy (SP)}, 97 title={Cache Storage Channels: Alias-Driven Attacks and Verified Countermeasures}, 98 year={2016}, 99 volume={}, 100 number={}, 101 pages={38-55}, 102 abstract={Caches pose a significant challenge to formal proofs of security 103 for code executing on application processors, as the cache 104 access pattern of security-critical services may leak secret 105 information. This paper reveals a novel attack vector, 106 exposing a low-noise cache storage channel that can be 107 exploited by adapting well-known timing channel analysis 108 techniques. The vector can also be used to attack various 109 types of security-critical software such as hypervisors and 110 application security monitors. The attack vector uses 111 virtual aliases with mismatched memory attributes and 112 self-modifying code to misconfigure the memory system, 113 allowing an attacker to place incoherent copies of the same 114 physical address into the caches and observe which addresses 115 are stored in different levels of cache. We design and 116 implement three different attacks using the new vector on 117 trusted services and report on the discovery of an 128-bit 118 key from an AES encryption service running in TrustZone on 119 Raspberry Pi 2. Moreover, we subvert the integrity 120 properties of an ARMv7 hypervisor that was formally verified 121 against a cache-less model. We evaluate well-known 122 countermeasures against the new attack vector and propose a 123 verification methodology that allows to formally prove the 124 effectiveness of defence mechanisms on the binary code of 125 the trusted software.}, 126 keywords={Security;Cache storage;Timing;Monitoring;Program processors;Virtual machine monitors;side channels;hypervisor;cache storage channels;verification}, 127 doi={10.1109/SP.2016.11}, 128 ISSN={2375-1207}, 129 month={May},} 130 131 @inproceedings{arm2017boomerang, 132 title={BOOMERANG: Exploiting the Semantic Gap in Trusted Execution Environments.}, 133 author={Machiry, Aravind and Gustafson, Eric and Spensky, Chad and Salls, Christopher and Stephens, Nick and Wang, Ruoyu and Bianchi, Antonio and Choe, Yung Ryn and Kruegel, Christopher and Vigna, Giovanni}, 134 booktitle={NDSS}, 135 year={2017} 136 } 137 @article{zhang2016truspy, 138 title={TruSpy: Cache Side-Channel Information Leakage from the Secure World on ARM Devices.}, 139 author={Zhang, Ning and Sun, Kun and Shands, Deborah and Lou, Wenjing and Hou, Y Thomas}, 140 journal={IACR Cryptol. ePrint Arch.}, 141 volume={2016}, 142 pages={980}, 143 year={2016} 144 } 145 146 147 148 @Misc{sim2019, 149 author = {Security Research Labs}, 150 title = {New SIM attacks de-mystified, protection tools now available }, 151 howpublished = {\url{https://srlabs.de/bites/sim_attacks_demystified/}}, 152 year = {2019}, 153 } 154 155 @TechReport{intel2020sgx, 156 author = {Dan Goodin}, 157 title = {Intel SGX is vulnerable to an unfixable flaw that can steal crypto keys and more}, 158 institution = {ARS Technica}, 159 year = {2020}, 160 } 161 162 163 164 165 @InProceedings{amd2019, 166 author = {Mengyuan Li and Yinqian Zhang and Zhiqiang Lin and Yan Solihin}, 167 title = {Exploiting Unprotected I/O Operations inAMD’s Secure Encrypted Virtualization}, 168 booktitle = {USENIX Security Symposium}, 169 year = {2019}, 170 } 171 172 @Misc{sim2020, 173 author = {Peter Buttler}, 174 title = {WIB Vulnerability: Sim-Card that Allows Hackers to Takeover Phones}, 175 howpublished = {\url{https://readwrite.com/2020/01/06/wib-vulnerability-sim-card-that-allows-hackers-to-takeover-phones/}}, 176 month = {January}, 177 year = {2020}, 178 } 179 180 @Misc{intel2020sgaxe, 181 author = {Ravie Lakshmanan}, 182 title = {Intel CPUs Vulnerable to New 'SGAxe' and 'CrossTalk' Side-Channel Attacks}, 183 howpublished = {\url{https://thehackernews.com/2020/06/intel-sgaxe-crosstalk-attacks.html}}, 184 month = {June}, 185 year = {2020}, 186 } 187 188 @Misc{intel2006survey, 189 author = {Alexander Nilsson and Pegah Nikbakht Bideh and Joakim Brorsson}, 190 title = {A Survey of Published Attacks on Intel SGX}, 191 howpublished = {\url{https://arxiv.org/pdf/2006.13598v1.pdf}}, 192 year = {2006}, 193 } 194 195 @inproceedings{arm2017clkscrew, 196 author = {Tang, Adrian and Sethumadhavan, Simha and Stolfo, Salvatore}, 197 title = {CLKSCREW: Exposing the Perils of Security-Oblivious Energy Management}, 198 year = {2017}, 199 isbn = {9781931971409}, 200 publisher = {USENIX Association}, 201 address = {USA}, 202 abstract = {The need for power- and energy-efficient computing has resulted in aggressive cooperative hardware-software energy management mechanisms on modern commodity devices. Most systems today, for example, allow software to control the frequency and voltage of the underlying hardware at a very fine granularity to extend battery life. Despite their benefits, these software-exposed energy management mechanisms pose grave security implications that have not been studied before.In this work, we present the CLKSCREW attack, a new class of fault attacks that exploit the security-obliviousness of energy management mechanisms to break security. A novel benefit for the attackers is that these fault attacks become more accessible since they can now be conducted without the need for physical access to the devices or fault injection equipment. We demonstrate CLKSCREW on commodity ARM/Android devices. We show that a malicious kernel driver (1) can extract secret cryptographic keys from Trustzone, and (2) can escalate its privileges by loading self-signed code into Trustzone. As the first work to show the security ramifications of energy management mechanisms, we urge the community to re-examine these security-oblivious designs.}, 203 booktitle = {Proceedings of the 26th USENIX Conference on Security Symposium}, 204 pages = {1057–1074}, 205 numpages = {18}, 206 location = {Vancouver, BC, Canada}, 207 series = {SEC'17} 208 } 209 210 @inproceedings{arm2016cache, 211 author = {Lipp, Moritz and Gruss, Daniel and Spreitzer, Raphael and Maurice, Cl\'{e}mentine and Mangard, Stefan}, 212 title = {ARMageddon: Cache Attacks on Mobile Devices}, 213 year = {2016}, 214 isbn = {9781931971324}, 215 publisher = {USENIX Association}, 216 address = {USA}, 217 abstract = {In the last 10 years, cache attacks on Intel x86 CPUs have gained increasing attention among the scientific community and powerful techniques to exploit cache side channels have been developed. However, modern smartphones use one or more multi-core ARM CPUs that have a different cache organization and instruction set than Intel x86 CPUs. So far, no cross-core cache attacks have been demonstrated on non-rooted Android smartphones. In this work, we demonstrate how to solve key challenges to perform the most powerful cross-core cache attacks Prime+Probe, Flush+Reload, Evict+Reload, and Flush+Flush on non-rooted ARM-based devices without any privileges. Based on our techniques, we demonstrate covert channels that outperform state-of-the-art covert channels on Android by several orders of magnitude. Moreover, we present attacks to monitor tap and swipe events as well as keystrokes, and even derive the lengths of words entered on the touchscreen. Eventually, we are the first to attack cryptographic primitives implemented in Java. Our attacks work across CPUs and can even monitor cache activity in the ARM TrustZone from the normal world. The techniques we present can be used to attack hundreds of millions of Android devices.}, 218 booktitle = {Proceedings of the 25th USENIX Conference on Security Symposium}, 219 pages = {549–564}, 220 numpages = {16}, 221 location = {Austin, TX, USA}, 222 series = {SEC'16} 223 }